<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch, branch v2.6.38.8</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch?h=v2.6.38.8</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch?h=v2.6.38.8'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2011-06-03T01:34:48Z</updated>
<entry>
<title>xen mmu: fix a race window causing leave_mm BUG()</title>
<updated>2011-06-03T01:34:48Z</updated>
<author>
<name>Tian, Kevin</name>
<email>kevin.tian@intel.com</email>
</author>
<published>2011-05-12T02:56:08Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=abe87a0b0ba5a0cddfab30bbafc6e2b121537b15'/>
<id>urn:sha1:abe87a0b0ba5a0cddfab30bbafc6e2b121537b15</id>
<content type='text'>
commit 7899891c7d161752f29abcc9bc0a9c6c3a3af26c upstream.

There's a race window in xen_drop_mm_ref, where remote cpu may exit
dirty bitmap between the check on this cpu and the point where remote
cpu handles drop request. So in drop_other_mm_ref we need check
whether TLB state is still lazy before calling into leave_mm. This
bug is rarely observed in earlier kernel, but exaggerated by the
commit 831d52bc153971b70e64eccfbed2b232394f22f8
("x86, mm: avoid possible bogus tlb entries by clearing prev mm_cpumask after switching mm")
which clears bitmap after changing the TLB state. the call trace is as below:

---------------------------------
kernel BUG at arch/x86/mm/tlb.c:61!
invalid opcode: 0000 [#1] SMP
last sysfs file: /sys/devices/system/xen_memory/xen_memory0/info/current_kb
CPU 1
Modules linked in: 8021q garp xen_netback xen_blkback blktap blkback_pagemap nbd bridge stp llc autofs4 ipmi_devintf ipmi_si ipmi_msghandler lockd sunrpc bonding ipv6 xenfs dm_multipath video output sbs sbshc parport_pc lp parport ses enclosure snd_seq_dummy snd_seq_oss snd_seq_midi_event snd_seq snd_seq_device serio_raw bnx2 snd_pcm_oss snd_mixer_oss snd_pcm snd_timer iTCO_wdt snd soundcore snd_page_alloc i2c_i801 iTCO_vendor_support i2c_core pcs pkr pata_acpi ata_generic ata_piix shpchp mptsas mptscsih mptbase [last unloaded: freq_table]
Pid: 25581, comm: khelper Not tainted 2.6.32.36fixxen #1 Tecal RH2285
RIP: e030:[&lt;ffffffff8103a3cb&gt;]  [&lt;ffffffff8103a3cb&gt;] leave_mm+0x15/0x46
RSP: e02b:ffff88002805be48  EFLAGS: 00010046
RAX: 0000000000000000 RBX: 0000000000000001 RCX: ffff88015f8e2da0
RDX: ffff88002805be78 RSI: 0000000000000000 RDI: 0000000000000001
RBP: ffff88002805be48 R08: ffff88009d662000 R09: dead000000200200
R10: dead000000100100 R11: ffffffff814472b2 R12: ffff88009bfc1880
R13: ffff880028063020 R14: 00000000000004f6 R15: 0000000000000000
FS:  00007f62362d66e0(0000) GS:ffff880028058000(0000) knlGS:0000000000000000
CS:  e033 DS: 0000 ES: 0000 CR0: 000000008005003b
CR2: 0000003aabc11909 CR3: 000000009b8ca000 CR4: 0000000000002660
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 00000000000000 00
DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
Process khelper (pid: 25581, threadinfo ffff88007691e000, task ffff88009b92db40)
Stack:
 ffff88002805be68 ffffffff8100e4ae 0000000000000001 ffff88009d733b88
&lt;0&gt; ffff88002805be98 ffffffff81087224 ffff88002805be78 ffff88002805be78
&lt;0&gt; ffff88015f808360 00000000000004f6 ffff88002805bea8 ffffffff81010108
Call Trace:
 &lt;IRQ&gt;
 [&lt;ffffffff8100e4ae&gt;] drop_other_mm_ref+0x2a/0x53
 [&lt;ffffffff81087224&gt;] generic_smp_call_function_single_interrupt+0xd8/0xfc
 [&lt;ffffffff81010108&gt;] xen_call_function_single_interrupt+0x13/0x28
 [&lt;ffffffff810a936a&gt;] handle_IRQ_event+0x66/0x120
 [&lt;ffffffff810aac5b&gt;] handle_percpu_irq+0x41/0x6e
 [&lt;ffffffff8128c1c0&gt;] __xen_evtchn_do_upcall+0x1ab/0x27d
 [&lt;ffffffff8128dd11&gt;] xen_evtchn_do_upcall+0x33/0x46
 [&lt;ffffffff81013efe&gt;] xen_do_hyper visor_callback+0x1e/0x30
 &lt;EOI&gt;
 [&lt;ffffffff814472b2&gt;] ? _spin_unlock_irqrestore+0x15/0x17
 [&lt;ffffffff8100f8cf&gt;] ? xen_restore_fl_direct_end+0x0/0x1
 [&lt;ffffffff81113f71&gt;] ? flush_old_exec+0x3ac/0x500
 [&lt;ffffffff81150dc5&gt;] ? load_elf_binary+0x0/0x17ef
 [&lt;ffffffff81150dc5&gt;] ? load_elf_binary+0x0/0x17ef
 [&lt;ffffffff8115115d&gt;] ? load_elf_binary+0x398/0x17ef
 [&lt;ffffffff81042fcf&gt;] ? need_resched+0x23/0x2d
 [&lt;ffffffff811f4648&gt;] ? process_measurement+0xc0/0xd7
 [&lt;ffffffff81150dc5&gt;] ? load_elf_binary+0x0/0x17ef
 [&lt;ffffffff81113094&gt;] ? search_binary_handler+0xc8/0x255
 [&lt;ffffffff81114362&gt;] ? do_execve+0x1c3/0x29e
 [&lt;ffffffff8101155d&gt;] ? sys_execve+0x43/0x5d
 [&lt;ffffffff8106fc45&gt;] ? __call_usermodehelper+0x0/0x6f
 [&lt;ffffffff81013e28&gt;] ? kernel_execve+0x68/0xd0
 [&lt;ffffffff 8106fc45&gt;] ? __call_usermodehelper+0x0/0x6f
 [&lt;ffffffff8100f8cf&gt;] ? xen_restore_fl_direct_end+0x0/0x1
 [&lt;ffffffff8106fb64&gt;] ? ____call_usermodehelper+0x113/0x11e
 [&lt;ffffffff81013daa&gt;] ? child_rip+0xa/0x20
 [&lt;ffffffff8106fc45&gt;] ? __call_usermodehelper+0x0/0x6f
 [&lt;ffffffff81012f91&gt;] ? int_ret_from_sys_call+0x7/0x1b
 [&lt;ffffffff8101371d&gt;] ? retint_restore_args+0x5/0x6
 [&lt;ffffffff81013da0&gt;] ? child_rip+0x0/0x20
Code: 41 5e 41 5f c9 c3 55 48 89 e5 0f 1f 44 00 00 e8 17 ff ff ff c9 c3 55 48 89 e5 0f 1f 44 00 00 65 8b 04 25 c8 55 01 00 ff c8 75 04 &lt;0f&gt; 0b eb fe 65 48 8b 34 25 c0 55 01 00 48 81 c6 b8 02 00 00 e8
RIP  [&lt;ffffffff8103a3cb&gt;] leave_mm+0x15/0x46
 RSP &lt;ffff88002805be48&gt;
---[ end trace ce9cee6832a9c503 ]---

Tested-by: Maoxiaoyun&lt;tinnycloud@hotmail.com&gt;
Signed-off-by: Kevin Tian &lt;kevin.tian@intel.com&gt;
[v1: Fleshed out the git description a bit]
Signed-off-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area</title>
<updated>2011-06-03T01:34:43Z</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2011-05-26T10:20:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f311af550d6d24b03c1c911572192bc95fe58404'/>
<id>urn:sha1:f311af550d6d24b03c1c911572192bc95fe58404</id>
<content type='text'>
commit a248b13b21ae00b97638b4f435c8df3075808b5d upstream.

The v6 and v7 implementations of flush_kern_dcache_area do not align
the passed MVA to the size of a cacheline in the data cache. If a
misaligned address is used, only a subset of the requested area will
be flushed. This has been observed to cause failures in SMP boot where
the secondary_data initialised by the primary CPU is not cacheline
aligned, causing the secondary CPUs to read incorrect values for their
pgd and stack pointers.

This patch ensures that the base address is cacheline aligned before
flushing the d-cache.

Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>sh: fixup fpu.o compile order</title>
<updated>2011-06-03T01:34:30Z</updated>
<author>
<name>Kuninori Morimoto</name>
<email>kuninori.morimoto.gx@renesas.com</email>
</author>
<published>2011-04-15T07:44:27Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=3a0d69ad4e806eb4aba6cb5ce167dc28a74f0e4c'/>
<id>urn:sha1:3a0d69ad4e806eb4aba6cb5ce167dc28a74f0e4c</id>
<content type='text'>
commit a375b15164dd9264f724ad941825e52c90145151 upstream.

arch_ptrace() was modified to reference init_fpu() to fix up xstate
initialization, which overlooked the fact that there are configurations
that don't enable any of hard FPU support or emulation, resulting in
build errors on DSP parts.

Given that init_fpu() simply sets up the xstate slab cache and is
side-stepped entirely for the DSP case, we can simply always build in the
helper and fix up the references.

Reported-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>oprofile, x86: Enable preemption during pci device setup in IBS init</title>
<updated>2011-06-03T01:34:11Z</updated>
<author>
<name>Robert Richter</name>
<email>robert.richter@amd.com</email>
</author>
<published>2011-05-20T07:46:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=cc5b828d1335a8652026d1ade17cfe96faf0676f'/>
<id>urn:sha1:cc5b828d1335a8652026d1ade17cfe96faf0676f</id>
<content type='text'>
commit 3d2606f42984613d324ad3047cf503bcddc3880a upstream.

IBS initialization is a mix of per-core register access and per-node
pci device setup. Register access should be pinned to the cpu, but pci
setup must run with preemption enabled.

This patch better separates the code into non-/preemptible sections
and fixes sleeping with preemption disabled. See bug message below.

Fixes also freeing the eilvt entry by introducing put_eilvt().

BUG: sleeping function called from invalid context at mm/slub.c:824
in_atomic(): 1, irqs_disabled(): 0, pid: 32357, name: modprobe
INFO: lockdep is turned off.
Pid: 32357, comm: modprobe Not tainted 2.6.39-rc7+ #14
Call Trace:
 [&lt;ffffffff8104bdc8&gt;] __might_sleep+0x112/0x117
 [&lt;ffffffff81129693&gt;] kmem_cache_alloc_trace+0x4b/0xe7
 [&lt;ffffffff81278f14&gt;] kzalloc.constprop.0+0x29/0x2b
 [&lt;ffffffff81278f4c&gt;] pci_get_subsys+0x36/0x78
 [&lt;ffffffff81022689&gt;] ? setup_APIC_eilvt+0xfb/0x139
 [&lt;ffffffff81278fa4&gt;] pci_get_device+0x16/0x18
 [&lt;ffffffffa06c8b5d&gt;] op_amd_init+0xd3/0x211 [oprofile]
 [&lt;ffffffffa064d000&gt;] ? 0xffffffffa064cfff
 [&lt;ffffffffa064d298&gt;] op_nmi_init+0x21e/0x26a [oprofile]
 [&lt;ffffffffa064d062&gt;] oprofile_arch_init+0xe/0x26 [oprofile]
 [&lt;ffffffffa064d010&gt;] oprofile_init+0x10/0x42 [oprofile]
 [&lt;ffffffff81002099&gt;] do_one_initcall+0x7f/0x13a
 [&lt;ffffffff81096524&gt;] sys_init_module+0x132/0x281
 [&lt;ffffffff814cc682&gt;] system_call_fastpath+0x16/0x1b

Reported-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: Robert Richter &lt;robert.richter@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86, cpufeature: Update CPU feature RDRND to RDRAND</title>
<updated>2011-06-03T01:34:11Z</updated>
<author>
<name>Kees Cook</name>
<email>kees.cook@canonical.com</email>
</author>
<published>2011-05-24T23:29:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=8da0d5755ac88a4027e0c511a2be7c0ef0c70634'/>
<id>urn:sha1:8da0d5755ac88a4027e0c511a2be7c0ef0c70634</id>
<content type='text'>
commit 7ccafc5f75c87853f3c49845d5a884f2376e03ce upstream.

The Intel manual changed the name of the CPUID bit to match the
instruction name. We should follow suit for sanity's sake. (See Intel SDM
Volume 2, Table 3-20 "Feature Information Returned in the ECX Register".)

[ hpa: we can only do this at this time because there are currently no CPUs
  with this feature on the market, hence this is pre-hardware enabling.
  However, Cc:'ing stable so that stable can present a consistent ABI. ]

Signed-off-by: Kees Cook &lt;kees.cook@canonical.com&gt;
Link: http://lkml.kernel.org/r/20110524232926.GA27728@outflux.net
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86, amd: Use _safe() msr access for GartTlbWlk disable code</title>
<updated>2011-06-03T01:34:10Z</updated>
<author>
<name>Roedel, Joerg</name>
<email>Joerg.Roedel@amd.com</email>
</author>
<published>2011-05-19T09:13:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=497ce1c280e962b3fd87d8c84d015a18127a0d79'/>
<id>urn:sha1:497ce1c280e962b3fd87d8c84d015a18127a0d79</id>
<content type='text'>
commit d47cc0db8fd6011de2248df505fc34990b7451bf upstream.

The workaround for Bugzilla:

	https://bugzilla.kernel.org/show_bug.cgi?id=33012

introduced a read and a write to the MC4 mask msr.

Unfortunatly this MSR is not emulated by the KVM hypervisor
so that the kernel will get a #GP and crashes when applying
this workaround when running inside KVM.

This issue was reported as:

	https://bugzilla.kernel.org/show_bug.cgi?id=35132

and is fixed with this patch. The change just let the kernel
ignore any #GP it gets while accessing this MSR by using the
_safe msr access methods.

Reported-by: Török Edwin &lt;edwintorok@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Cc: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Cc: Maciej Rutecki &lt;maciej.rutecki@gmail.com&gt;
Cc: Avi Kivity &lt;avi@redhat.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86, amd: Do not enable ARAT feature on AMD processors below family 0x12</title>
<updated>2011-06-03T01:34:06Z</updated>
<author>
<name>Boris Ostrovsky</name>
<email>ostr@amd64.org</email>
</author>
<published>2011-05-26T15:19:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=82a56dc10641d8ab447ea3a693c36f7e167a423f'/>
<id>urn:sha1:82a56dc10641d8ab447ea3a693c36f7e167a423f</id>
<content type='text'>
commit e9cdd343a5e42c43bcda01e609fa23089e026470 upstream.

Commit b87cf80af3ba4b4c008b4face3c68d604e1715c6 added support for
ARAT (Always Running APIC timer) on AMD processors that are not
affected by erratum 400. This erratum is present on certain processor
families and prevents APIC timer from waking up the CPU when it
is in a deep C state, including C1E state.

Determining whether a processor is affected by this erratum may
have some corner cases and handling these cases is somewhat
complicated. In the interest of simplicity we won't claim ARAT
support on processor families below 0x12 and will go back to
broadcasting timer when going idle.

Signed-off-by: Boris Ostrovsky &lt;ostr@amd64.org&gt;
Link: http://lkml.kernel.org/r/1306423192-19774-1-git-send-email-ostr@amd64.org
Tested-by: Boris Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Hans Rosenfeld &lt;Hans.Rosenfeld@amd.com&gt;
Cc: Andreas Herrmann &lt;Andreas.Herrmann3@amd.com&gt;
Cc: Chuck Ebbert &lt;cebbert@redhat.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86, ioapic: Fix potential resume deadlock</title>
<updated>2011-06-03T01:34:06Z</updated>
<author>
<name>Daniel J Blueman</name>
<email>daniel.blueman@gmail.com</email>
</author>
<published>2011-05-18T23:31:31Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=2e05fd68447a2ab4205dbd316f086f0861fbc37c'/>
<id>urn:sha1:2e05fd68447a2ab4205dbd316f086f0861fbc37c</id>
<content type='text'>
commit b64ce24daffb634b5b3133a2e411bd4de50654e8 upstream.

Fix a potential deadlock when resuming; here the calling
function has disabled interrupts, so we cannot sleep.

Change the memory allocation flag from GFP_KERNEL to GFP_ATOMIC.

TODO: We can do away with this memory allocation during resume
      by reusing the ioapic suspend/resume code that uses boot time
      allocated buffers, but we want to keep this -stable patch
      simple.

Signed-off-by: Daniel J Blueman &lt;daniel.blueman@gmail.com&gt;
Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Link: http://lkml.kernel.org/r/20110518233157.385970138@sbsiddha-MOBL3.sc.intel.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>wire up clock_adjtime syscall</title>
<updated>2011-06-03T01:33:50Z</updated>
<author>
<name>James Bottomley</name>
<email>James.Bottomley@HansenPartnership.com</email>
</author>
<published>2011-04-15T15:55:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=baa950b85e4a7e6965da1cf618801735584ad65e'/>
<id>urn:sha1:baa950b85e4a7e6965da1cf618801735584ad65e</id>
<content type='text'>
commit c3f957a22eca106bd28136943305b390b4337ebf upstream.

Signed-off-by: James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>wire up fanotify syscalls</title>
<updated>2011-06-03T01:33:50Z</updated>
<author>
<name>James Bottomley</name>
<email>James.Bottomley@HansenPartnership.com</email>
</author>
<published>2011-04-15T15:55:44Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=352e844e4670bbdc878c0c05301d105fb38c9fe6'/>
<id>urn:sha1:352e844e4670bbdc878c0c05301d105fb38c9fe6</id>
<content type='text'>
commit 1824074b07ee66fa0f714e08579ad85075132d7b upstream.

Signed-off-by: James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
</feed>
