<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/tile/lib, branch v3.8</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/tile/lib?h=v3.8</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/tile/lib?h=v3.8'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-02-08T18:20:36Z</updated>
<entry>
<title>tile: export a handful of symbols appropriately</title>
<updated>2013-02-08T18:20:36Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2013-02-01T20:06:06Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7c63e1ee0afe0e957292463cfa111ba59193ab2f'/>
<id>urn:sha1:7c63e1ee0afe0e957292463cfa111ba59193ab2f</id>
<content type='text'>
This was shown up by running with "allmodconfig".  I used
EXPORT_SYMBOL() to match existing conventions in files that
were already exporting symbols, or that were exported that way
by other architectures, and otherwise EXPORT_SYMBOL_GPL().

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: break out the "csum a long" function to &lt;asm/checksum.h&gt;</title>
<updated>2012-07-11T20:04:57Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-04-28T19:41:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=10104a1ad670889adc1ae3779df968db621b5dbd'/>
<id>urn:sha1:10104a1ad670889adc1ae3779df968db621b5dbd</id>
<content type='text'>
This makes it available to the tilegx network driver.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: Allow tilegx to build with either 16K or 64K page size</title>
<updated>2012-05-25T16:48:24Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-29T17:58:43Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d5d14ed6f2db7287a5088e1350cf422bf72140b3'/>
<id>urn:sha1:d5d14ed6f2db7287a5088e1350cf422bf72140b3</id>
<content type='text'>
This change introduces new flags for the hv_install_context()
API that passes a page table pointer to the hypervisor.  Clients
can explicitly request 4K, 16K, or 64K small pages when they
install a new context.  In practice, the page size is fixed at
kernel compile time and the same size is always requested every
time a new page table is installed.

The &lt;hv/hypervisor.h&gt; header changes so that it provides more abstract
macros for managing "page" things like PFNs and page tables.  For
example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old
HV_PAGE_SIZE_SMALL.  The various PFN routines have been eliminated and
only PA- or PTFN-based ones remain (since PTFNs are always expressed
in fixed 2KB "page" size).  The page-table management macros are
renamed with a leading underscore and take page-size arguments with
the presumption that clients will use those macros in some single
place to provide the "real" macros they will use themselves.

I happened to notice the old hv_set_caching() API was totally broken
(it assumed 4KB pages) so I changed it so it would nominally work
correctly with other page sizes.

Tag modules with the page size so you can't load a module built with
a conflicting page size.  (And add a test for SMP while we're at it.)

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: optimize get_user/put_user and friends</title>
<updated>2012-05-25T16:48:23Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-29T17:39:51Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=47d632f9f8f3ed62b21f725e98b726d65769b6d7'/>
<id>urn:sha1:47d632f9f8f3ed62b21f725e98b726d65769b6d7</id>
<content type='text'>
Use direct load/store for the get_user/put_user.

Previously, we would call out to a helper routine that would do the
appropriate thing and then return, handling the possible exception
internally.  Now we inline the load or store, along with a "we succeeded"
indication in a register; if the load or store faults, we write a
"we failed" indication into the same register and then return to the
following instruction.  This is more efficient and gives us more compact
code, as well as being more in line with what other architectures do.

The special futex assembly source file for TILE-Gx also disappears in
this change; we just use the same inlining idiom there as well, putting
the appropriate atomic operations directly into futex_atomic_op_inuser()
(and thus into the FUTEX_WAIT function).

The underlying atomic copy_from_user, copy_to_user functions were
renamed using the (cryptic) x86 convention as copy_from_user_ll and
copy_to_user_ll.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: support building big-endian kernel</title>
<updated>2012-05-25T16:48:22Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-29T17:30:31Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=1efea40d4172a2a475ccb29b59d6221e9d0c174b'/>
<id>urn:sha1:1efea40d4172a2a475ccb29b59d6221e9d0c174b</id>
<content type='text'>
The toolchain supports big-endian mode now, so add support for building
the kernel to run big-endian as well.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: fix finv_buffer_remote() for tilegx</title>
<updated>2012-04-02T16:13:53Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-30T19:47:38Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=54229ff359250ce7292dbeb59f157a2d3b67e30c'/>
<id>urn:sha1:54229ff359250ce7292dbeb59f157a2d3b67e30c</id>
<content type='text'>
There were some correctness issues with this code that are now fixed
with this change.  The change is likely less performant than it could
be, but it should no longer be vulnerable to any races with memory
operations on the memory network while invalidating a range of memory.
This code is run infrequently so performance isn't critical, but
correctness definitely is.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: fix pointer cast in cacheflush.c</title>
<updated>2012-04-02T16:13:39Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-29T20:14:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=918cbd38aef83de3a2516299bcb230caf59462a0'/>
<id>urn:sha1:918cbd38aef83de3a2516299bcb230caf59462a0</id>
<content type='text'>
Pragmatically it couldn't be wrong to cast pointers to long to compare
them (since all kernel addresses are in the top half of VA space),
but it's more correct to cast to unsigned long.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: fix bug in delay_backoff()</title>
<updated>2012-04-02T16:13:15Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-29T19:43:20Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=444eef1ba40546690a77b2af4cba7d4561e7bba5'/>
<id>urn:sha1:444eef1ba40546690a77b2af4cba7d4561e7bba5</id>
<content type='text'>
We were carefully computing a value to use for the number of loops
to spin for, and then ignoring it.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: make sure to build memcpy_user_64 without frame pointer</title>
<updated>2012-04-02T16:12:42Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-03-29T18:05:04Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=efb734d8ed040b053f53fd53589ed5d9c9b5cd04'/>
<id>urn:sha1:efb734d8ed040b053f53fd53589ed5d9c9b5cd04</id>
<content type='text'>
Add a comment explaining why this is important, and add a CFLAGS_REMOVE
clause to the Makefile to make sure it happens.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: misplaced parens near likely</title>
<updated>2012-03-12T19:32:18Z</updated>
<author>
<name>roel</name>
<email>roel.kluin@gmail.com</email>
</author>
<published>2011-12-12T22:34:06Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=cf8c1dafe19ae9f855bf7b9cce2e13b26c3289b7'/>
<id>urn:sha1:cf8c1dafe19ae9f855bf7b9cce2e13b26c3289b7</id>
<content type='text'>
Parentheses were missing.

Signed-off-by: Roel Kluin &lt;roel.kluin@gmail.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
</feed>
