<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/tile/kernel/process.c, branch v3.2.41</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/tile/kernel/process.c?h=v3.2.41</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/tile/kernel/process.c?h=v3.2.41'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2011-05-12T19:52:12Z</updated>
<entry>
<title>arch/tile: finish enabling support for TILE-Gx 64-bit chip</title>
<updated>2011-05-12T19:52:12Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-04T18:38:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=18aecc2b645bbb07851b196452a2af314222069b'/>
<id>urn:sha1:18aecc2b645bbb07851b196452a2af314222069b</id>
<content type='text'>
This support was partially present in the existing code (look for
"__tilegx__" ifdefs) but with this change you can build a working
kernel using the TILE-Gx toolchain and ARCH=tilegx.

Most of these files are new, generally adding a foo_64.c file
where previously there was just a foo_32.c file.

The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx,
using the existing SRCARCH mechanism in the top-level Makefile.

Changes to existing files:

- &lt;asm/bitops.h&gt; and &lt;asm/bitops_32.h&gt; changed to factor the
  include of &lt;asm-generic/bitops/non-atomic.h&gt; in the common header.

- &lt;asm/compat.h&gt; and arch/tile/kernel/compat.c changed to remove
  the "const" markers I had put on compat_sys_execve() when trying
  to match some recent similar changes to the non-compat execve.
  It turns out the compat version wasn't "upgraded" to use const.

- &lt;asm/opcode-tile_64.h&gt; and &lt;asm/opcode_constants_64.h&gt; were
  previously included accidentally, with the 32-bit contents.  Now
  they have the proper 64-bit contents.

Finally, I had to hack the existing hacky drivers/input/input-compat.h
to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64).

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt; [drivers/input]
</content>
</entry>
<entry>
<title>arch/tile: support TIF_NOTIFY_RESUME</title>
<updated>2011-05-02T22:53:35Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-02T18:50:06Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=313ce674d3cbc2d48ed34a9462427920ac54f4ad'/>
<id>urn:sha1:313ce674d3cbc2d48ed34a9462427920ac54f4ad</id>
<content type='text'>
This support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc.
The change is slightly more complex than the minimal thing, since
I took advantage of having to go into the assembly code to just
move a bunch of stuff into C code: specifically, the schedule(),
do_async_page_fault(), do_signal(), and single_step_once() support,
in addition to the TIF_NOTIFY_RESUME support.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>mm: NUMA aware alloc_thread_info_node()</title>
<updated>2011-03-23T00:44:01Z</updated>
<author>
<name>Eric Dumazet</name>
<email>eric.dumazet@gmail.com</email>
</author>
<published>2011-03-22T23:30:42Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=b6a84016bd2598e35ead635147fa53619982648d'/>
<id>urn:sha1:b6a84016bd2598e35ead635147fa53619982648d</id>
<content type='text'>
Add a node parameter to alloc_thread_info(), and change its name to
alloc_thread_info_node()

This change is needed to allow NUMA aware kthread_create_on_cpu()

Signed-off-by: Eric Dumazet &lt;eric.dumazet@gmail.com&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Reviewed-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Acked-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Tejun Heo &lt;tj@kernel.org&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Cc: David Howells &lt;dhowells@redhat.com&gt;
Cc: &lt;linux-arch@vger.kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>arch/tile: support 4KB page size as well as 64KB</title>
<updated>2011-03-10T18:17:53Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-02-28T21:37:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=76c567fbba50c3da2f4d40e2e551bab26cfd4381'/>
<id>urn:sha1:76c567fbba50c3da2f4d40e2e551bab26cfd4381</id>
<content type='text'>
The Tilera architecture traditionally supports 64KB page sizes
to improve TLB utilization and improve performance when the
hardware is being used primarily to run a single application.

For more generic server scenarios, it can be beneficial to run
with 4KB page sizes, so this commit allows that to be specified
(by modifying the arch/tile/include/hv/pagesize.h header).

As part of this change, we also re-worked the PTE management
slightly so that PTE writes all go through a __set_pte() function
where we can do some additional validation.  The set_pte_order()
function was eliminated since the "order" argument wasn't being used.

One bug uncovered was in the PCI DMA code, which wasn't properly
flushing the specified range.  This was benign with 64KB pages,
but with 4KB pages we were getting some larger flushes wrong.

The per-cpu memory reservation code also needed updating to
conform with the newer percpu stuff; before it always chose 64KB,
and that was always correct, but with 4KB granularity we now have
to pay closer attention and reserve the amount of memory that will
be requested when the percpu code starts allocating.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: bug fix: exec'ed task thought it was still single-stepping</title>
<updated>2011-03-01T21:19:58Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-02-28T18:08:32Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=04f7a3f12e10032ee3d44df1a509dbf5b2001fce'/>
<id>urn:sha1:04f7a3f12e10032ee3d44df1a509dbf5b2001fce</id>
<content type='text'>
To handle single-step, tile mmap's a page of memory in the process
space for each thread and uses it to construct a version of the
instruction that we want to single step.  If the process exec's,
though, we lose that mapping, and the kernel needs to be aware that
it will need to recreate it if the exec'ed process than tries to
single-step as well.

Also correct some int32_t to s32 for better kernel style.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: handle CLONE_SETTLS in copy_thread(), not user space</title>
<updated>2010-12-17T21:56:50Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-12-14T20:57:49Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=bc4cf2bb271b2d557fc510426755da786fc985be'/>
<id>urn:sha1:bc4cf2bb271b2d557fc510426755da786fc985be</id>
<content type='text'>
Previously we were just setting up the "tp" register in the
new task as started by clone() in libc.  However, this is not
quite right, since in principle a signal might be delivered to
the new task before it had its TLS set up.  (Of course, this race
window still exists for resetting the libc getpid() cached value
in the new task, in principle.  But in any case, we are now doing
this exactly the way all other architectures do it.)

This change is important for 2.6.37 since the tile glibc we will
be submitting upstream will not set TLS in user space any more,
so it will only work on a kernel that has this fix.  It should
also be taken for 2.6.36.x in the stable tree if possible.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Cc: stable &lt;stable@kernel.org&gt;
</content>
</entry>
<entry>
<title>arch/tile: parameterize system PLs to support KVM port</title>
<updated>2010-10-15T19:38:09Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-10-14T20:23:03Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a78c942df64ef4cf495fd4d8715e48501bd7f8a4'/>
<id>urn:sha1:a78c942df64ef4cf495fd4d8715e48501bd7f8a4</id>
<content type='text'>
While not a port to KVM (yet), this change modifies the kernel
to be able to build either at PL1 or at PL2 with a suitable
config switch.  Pushing up this change avoids handling branch
merge issues going forward with the KVM work.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: update some comments to clarify register usage.</title>
<updated>2010-10-14T18:42:58Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-10-14T18:42:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d6f0f22c3c409f9ed88e64f881f8308730be76f0'/>
<id>urn:sha1:d6f0f22c3c409f9ed88e64f881f8308730be76f0</id>
<content type='text'>
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: Use &lt;asm-generic/syscalls.h&gt;</title>
<updated>2010-10-14T18:34:33Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-10-14T18:34:33Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d929b6aeaacbe78cbfef4a80e3eed1bf0464d984'/>
<id>urn:sha1:d929b6aeaacbe78cbfef4a80e3eed1bf0464d984</id>
<content type='text'>
With this change we now include &lt;asm-generic/syscalls.h&gt; into the "tile"
version of the header.  To take full advantage of the prototypes there,
we also change our naming convention for "struct pt_regs *" syscalls so
that, e.g., _sys_execve() is the "true" syscall entry, which sets the
appropriate register to point to the pt_regs before calling sys_execve().

While doing this I realized I no longer needed the fork and vfork
entry point stubs, since those functions aren't in the generic
syscall ABI, so I removed them as well.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: fix formatting bug in register dumps</title>
<updated>2010-09-15T15:17:05Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-09-15T15:17:05Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7040dea4d2a0609241c7a98a944b7c432c69db2e'/>
<id>urn:sha1:7040dea4d2a0609241c7a98a944b7c432c69db2e</id>
<content type='text'>
This cut-and-paste bug was caused by rewriting the register dump
code to use only a single printk per line of output.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
</feed>
