<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/tile/include/asm/processor.h, branch v3.2.41</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/tile/include/asm/processor.h?h=v3.2.41</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/tile/include/asm/processor.h?h=v3.2.41'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2011-05-20T02:55:59Z</updated>
<entry>
<title>arch/tile: support signal "exception-trace" hook</title>
<updated>2011-05-20T02:55:59Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-16T18:23:44Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=571d76acdab95876aeff869ab6449f826c23aa43'/>
<id>urn:sha1:571d76acdab95876aeff869ab6449f826c23aa43</id>
<content type='text'>
This change adds support for /proc/sys/debug/exception-trace to tile.
Like x86 and sparc, by default it is set to "1", generating a one-line
printk whenever a user process crashes.  By setting it to "2", we get
a much more complete userspace diagnostic at crash time, including
a user-space backtrace, register dump, and memory dump around the
address of the crash.

Some vestiges of the Tilera-internal version of this support are
removed with this patch (the show_crashinfo variable and the
arch_coredump_signal function).  We retain a "crashinfo" boot parameter
which allows you to set the boot-time value of exception-trace.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: support TIF_NOTIFY_RESUME</title>
<updated>2011-05-02T22:53:35Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-02T18:50:06Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=313ce674d3cbc2d48ed34a9462427920ac54f4ad'/>
<id>urn:sha1:313ce674d3cbc2d48ed34a9462427920ac54f4ad</id>
<content type='text'>
This support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc.
The change is slightly more complex than the minimal thing, since
I took advantage of having to go into the assembly code to just
move a bunch of stuff into C code: specifically, the schedule(),
do_async_page_fault(), do_signal(), and single_step_once() support,
in addition to the TIF_NOTIFY_RESUME support.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: fix some comments and whitespace</title>
<updated>2011-03-10T18:14:03Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-02-28T20:58:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=5fb682b0644cd20015d9b0e3ca6921ad5533f4ba'/>
<id>urn:sha1:5fb682b0644cd20015d9b0e3ca6921ad5533f4ba</id>
<content type='text'>
This is a grab bag of changes with no actual change to generated code.
This includes whitespace and comment typos, plus a couple of stale
comments being removed.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>drivers/net/tile/: on-chip network drivers for the tile architecture</title>
<updated>2010-11-24T18:11:18Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-11-01T21:00:37Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e5a06939736277c54a68ae275433db55b99d187c'/>
<id>urn:sha1:e5a06939736277c54a68ae275433db55b99d187c</id>
<content type='text'>
This change adds the first network driver for the tile architecture,
supporting the on-chip XGBE and GBE shims.

The infrastructure is present for the TILE-Gx networking drivers (another
three source files in the new directory) but for now the the actual
tilegx sources are waiting on releasing hardware to initial customers.

Note that arch/tile/include/hv/* are "upstream" headers from the
Tilera hypervisor and will probably benefit less from LKML review.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: parameterize system PLs to support KVM port</title>
<updated>2010-10-15T19:38:09Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-10-14T20:23:03Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a78c942df64ef4cf495fd4d8715e48501bd7f8a4'/>
<id>urn:sha1:a78c942df64ef4cf495fd4d8715e48501bd7f8a4</id>
<content type='text'>
While not a port to KVM (yet), this change modifies the kernel
to be able to build either at PL1 or at PL2 with a suitable
config switch.  Pushing up this change avoids handling branch
merge issues going forward with the KVM work.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: Save and restore extra user state for tilegx</title>
<updated>2010-09-15T15:16:10Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-09-15T15:16:10Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a802fc685426303ab627b7ad3fd5c97b5dea7e00'/>
<id>urn:sha1:a802fc685426303ab627b7ad3fd5c97b5dea7e00</id>
<content type='text'>
During context switch, save and restore a couple of additional bits of
tilegx user state that can be persistently modified by userspace.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: catch up on various minor cleanups.</title>
<updated>2010-07-06T17:42:15Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-07-02T18:19:35Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ef06f55a5c936a395f3ee2e1237bbebdb4396c65'/>
<id>urn:sha1:ef06f55a5c936a395f3ee2e1237bbebdb4396c65</id>
<content type='text'>
None of these changes fix any actual bugs, but are just various cleanups
that fell out along the way.  In particular, some unused #defines and
includes are removed, PREFETCH_STRIDE is added (the default is right for
our shipping chips, but wrong for our next generation), our tile-specific
prefetching code is removed so the (identical) generic prefetching code
can be used instead, a comment is fixed to be proper GPL and not just a
"paste GPL here" token, a "//" comment is converted to "/* */", etc.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arch/tile: Add driver to enable access to the user dynamic network.</title>
<updated>2010-07-06T17:34:15Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-06-25T21:00:56Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=9f9c0382cda2334b35b40b00f4ed9d6f89f37a7b'/>
<id>urn:sha1:9f9c0382cda2334b35b40b00f4ed9d6f89f37a7b</id>
<content type='text'>
This network (the "UDN") connects all the cpus on the chip in a
wormhole-routed dynamic network.  Subrectangles of the chip can
be allocated by a "create" ioctl on /dev/hardwall, and then to access the
UDN in that rectangle, tasks must perform an "activate" ioctl on that
same file object after affinitizing themselves to a single cpu in
the region.  Sending a wormhole-routed message that tries to leave
that subrectangle causes all activated tasks to receive a SIGILL
(just as they would if they tried to access the UDN without first
activating themselves to a hardwall rectangle).

The original submission of this code to LKML had the driver
instantiated under /proc/tile/hardwall.  Now we just use a character
device for this, conventionally /dev/hardwall.  Some futures planning
for the TILE-Gx chip suggests that we may want to have other types of
devices that share the general model of "bind a task to a cpu, then
'activate' a file descriptor on a pseudo-device that gives access to
some hardware resource".  As such, we are using a device rather
than, for example, a syscall, to set up and activate this code.

As part of this change, the compat_ptr() declaration was fixed and used
to pass the compat_ioctl argument to the normal ioctl.  So far we limit
compat code to 2GB, so the difference between zero-extend and sign-extend
(the latter being correct, eventually) had been overlooked.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arch/tile: core support for Tilera 32-bit chips.</title>
<updated>2010-06-04T21:11:18Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-05-29T03:09:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=867e359b97c970a60626d5d76bbe2a8fadbf38fb'/>
<id>urn:sha1:867e359b97c970a60626d5d76bbe2a8fadbf38fb</id>
<content type='text'>
This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.

This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Reviewed-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
</feed>
