tile: use a more conservative __my_cpu_offset in CONFIG_PREEMPT

2013-09-30T14:34:41Z

It turns out the kernel relies on barrier() to force a reload of the percpu offset value. Since we can't easily modify the definition of barrier() to include "tp" as an output register, we instead provide a definition of __my_cpu_offset as extended assembly that includes a fake stack read to hazard against barrier(), forcing gcc to know that it must reread "tp" and recompute anything based on "tp" after a barrier. This fixes observed hangs in the slub allocator when we are looping on a percpu cmpxchg_double. A similar fix for ARMv7 was made in June in change 509eb76ebf97. Cc: stable@vger.kernel.org Signed-off-by: Chris Metcalf

arch/tile: core support for Tilera 32-bit chips.

2010-06-04T21:11:18Z

This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf Acked-by: Arnd Bergmann Acked-by: FUJITA Tomonori Reviewed-by: Paul Mundt

linux/arch/tile/include/asm/percpu.h, branch v3.13

tile: use a more conservative __my_cpu_offset in CONFIG_PREEMPT

arch/tile: core support for Tilera 32-bit chips.