<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/tile/include/asm/bitops.h, branch v3.2.41</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/tile/include/asm/bitops.h?h=v3.2.41</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/tile/include/asm/bitops.h?h=v3.2.41'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-05-30T23:44:03Z</updated>
<entry>
<title>tile: fix bug where fls(0) was not returning 0</title>
<updated>2012-05-30T23:44:03Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-05-25T16:32:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=10c9eea8f9831180c52bfbb0ddf9af6e51989a41'/>
<id>urn:sha1:10c9eea8f9831180c52bfbb0ddf9af6e51989a41</id>
<content type='text'>
commit 9f1d62bed7f015d11b9164078b7fea433b474114 upstream.

This is because __builtin_clz(0) returns 64 for the "undefined" case
of 0, since the builtin just does a right-shift 32 and "clz" instruction.
So, use the alpha approach of casting to u32 and using __builtin_clzll().

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>arch/tile: finish enabling support for TILE-Gx 64-bit chip</title>
<updated>2011-05-12T19:52:12Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-04T18:38:26Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=18aecc2b645bbb07851b196452a2af314222069b'/>
<id>urn:sha1:18aecc2b645bbb07851b196452a2af314222069b</id>
<content type='text'>
This support was partially present in the existing code (look for
"__tilegx__" ifdefs) but with this change you can build a working
kernel using the TILE-Gx toolchain and ARCH=tilegx.

Most of these files are new, generally adding a foo_64.c file
where previously there was just a foo_32.c file.

The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx,
using the existing SRCARCH mechanism in the top-level Makefile.

Changes to existing files:

- &lt;asm/bitops.h&gt; and &lt;asm/bitops_32.h&gt; changed to factor the
  include of &lt;asm-generic/bitops/non-atomic.h&gt; in the common header.

- &lt;asm/compat.h&gt; and arch/tile/kernel/compat.c changed to remove
  the "const" markers I had put on compat_sys_execve() when trying
  to match some recent similar changes to the non-compat execve.
  It turns out the compat version wasn't "upgraded" to use const.

- &lt;asm/opcode-tile_64.h&gt; and &lt;asm/opcode_constants_64.h&gt; were
  previously included accidentally, with the 32-bit contents.  Now
  they have the proper 64-bit contents.

Finally, I had to hack the existing hacky drivers/input/input-compat.h
to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64).

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt; [drivers/input]
</content>
</entry>
<entry>
<title>bitops: remove minix bitops from asm/bitops.h</title>
<updated>2011-03-24T02:46:22Z</updated>
<author>
<name>Akinobu Mita</name>
<email>akinobu.mita@gmail.com</email>
</author>
<published>2011-03-23T23:42:16Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=61f2e7b0f474225b4226772830ae4b29a3a21f8d'/>
<id>urn:sha1:61f2e7b0f474225b4226772830ae4b29a3a21f8d</id>
<content type='text'>
minix bit operations are only used by minix filesystem and useless by
other modules.  Because byte order of inode and block bitmaps is different
on each architecture like below:

m68k:
	big-endian 16bit indexed bitmaps

h8300, microblaze, s390, sparc, m68knommu:
	big-endian 32 or 64bit indexed bitmaps

m32r, mips, sh, xtensa:
	big-endian 32 or 64bit indexed bitmaps for big-endian mode
	little-endian bitmaps for little-endian mode

Others:
	little-endian bitmaps

In order to move minix bit operations from asm/bitops.h to architecture
independent code in minix filesystem, this provides two config options.

CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k.
CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use
native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu,
m32r, mips, sh, xtensa).  The architectures which always use little-endian
bitmaps do not select these options.

Finally, we can remove minix bit operations from asm/bitops.h for all
architectures.

Signed-off-by: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Roman Zippel &lt;zippel@linux-m68k.org&gt;
Cc: Andreas Schwab &lt;schwab@linux-m68k.org&gt;
Cc: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Cc: Heiko Carstens &lt;heiko.carstens@de.ibm.com&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Cc: Michal Simek &lt;monstr@monstr.eu&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Hirokazu Takata &lt;takata@linux-m32r.org&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>bitops: remove ext2 non-atomic bitops from asm/bitops.h</title>
<updated>2011-03-24T02:46:21Z</updated>
<author>
<name>Akinobu Mita</name>
<email>akinobu.mita@gmail.com</email>
</author>
<published>2011-03-23T23:42:14Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f312eff8164879e04923d41e9dd23e7850937d85'/>
<id>urn:sha1:f312eff8164879e04923d41e9dd23e7850937d85</id>
<content type='text'>
As the result of conversions, there are no users of ext2 non-atomic bit
operations except for ext2 filesystem itself.  Now we can put them into
architecture independent code in ext2 filesystem, and remove from
asm/bitops.h for all architectures.

Signed-off-by: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Cc: Jan Kara &lt;jack@suse.cz&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>bitops: introduce little-endian bitops for most architectures</title>
<updated>2011-03-24T02:46:15Z</updated>
<author>
<name>Akinobu Mita</name>
<email>akinobu.mita@gmail.com</email>
</author>
<published>2011-03-23T23:42:02Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=861b5ae7cde96ca081914e21dedfa7e8a38da622'/>
<id>urn:sha1:861b5ae7cde96ca081914e21dedfa7e8a38da622</id>
<content type='text'>
Introduce little-endian bit operations to the big-endian architectures
which do not have native little-endian bit operations and the
little-endian architectures.  (alpha, avr32, blackfin, cris, frv, h8300,
ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa)

These architectures can just include generic implementation
(asm-generic/bitops/le.h).

Signed-off-by: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Cc: Richard Henderson &lt;rth@twiddle.net&gt;
Cc: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Cc: Mikael Starvik &lt;starvik@axis.com&gt;
Cc: David Howells &lt;dhowells@redhat.com&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Cc: "Luck, Tony" &lt;tony.luck@intel.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
Cc: Matthew Wilcox &lt;willy@debian.org&gt;
Cc: Grant Grundler &lt;grundler@parisc-linux.org&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Kazumoto Kojima &lt;kkojima@rr.iij4u.or.jp&gt;
Cc: Hirokazu Takata &lt;takata@linux-m32r.org&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Hans-Christian Egtvedt &lt;hans-christian.egtvedt@atmel.com&gt;
Acked-by: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>bitops: make asm-generic/bitops/find.h more generic</title>
<updated>2010-10-09T19:51:44Z</updated>
<author>
<name>Akinobu Mita</name>
<email>akinobu.mita@gmail.com</email>
</author>
<published>2010-09-29T09:08:50Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=708ff2a0097b02d32d375b66996661f36cd4d6d1'/>
<id>urn:sha1:708ff2a0097b02d32d375b66996661f36cd4d6d1</id>
<content type='text'>
asm-generic/bitops/find.h has the extern declarations of find_next_bit()
and find_next_zero_bit() and the macro definitions of find_first_bit()
and find_first_zero_bit(). It is only usable by the architectures which
enables CONFIG_GENERIC_FIND_NEXT_BIT and disables
CONFIG_GENERIC_FIND_FIRST_BIT.

x86 and tile enable both CONFIG_GENERIC_FIND_NEXT_BIT and
CONFIG_GENERIC_FIND_FIRST_BIT. These architectures cannot include
asm-generic/bitops/find.h in their asm/bitops.h. So ifdefed extern
declarations of find_first_bit and find_first_zero_bit() are put in
linux/bitops.h.

This makes asm-generic/bitops/find.h usable by these architectures
and use it. Also this change is needed for the forthcoming duplicated
extern declarations cleanup.

Signed-off-by: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: x86@kernel.org
Cc: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: Rename the hweight() implementations to __arch_hweight()</title>
<updated>2010-08-14T00:45:54Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-08-14T00:32:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=947e7dc1aed0532478e10988328bfd7426e0c2bd'/>
<id>urn:sha1:947e7dc1aed0532478e10988328bfd7426e0c2bd</id>
<content type='text'>
See commit 1527bc8b928dd1399c3d3467dd47d9ede210978a.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: core support for Tilera 32-bit chips.</title>
<updated>2010-06-04T21:11:18Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-05-29T03:09:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=867e359b97c970a60626d5d76bbe2a8fadbf38fb'/>
<id>urn:sha1:867e359b97c970a60626d5d76bbe2a8fadbf38fb</id>
<content type='text'>
This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.

This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Reviewed-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
</feed>
