<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/ppc/syslib, branch v2.6.13-rc7</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/ppc/syslib?h=v2.6.13-rc7</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/ppc/syslib?h=v2.6.13-rc7'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2005-08-18T19:53:58Z</updated>
<entry>
<title>[PATCH] ppc32: fix ppc4xx stb03xxx dma build</title>
<updated>2005-08-18T19:53:58Z</updated>
<author>
<name>Matt Porter</name>
<email>mporter@kernel.crashing.org</email>
</author>
<published>2005-08-18T18:24:25Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=28cd1d17801774561c81a5be53bfb2d632aee2a2'/>
<id>urn:sha1:28cd1d17801774561c81a5be53bfb2d632aee2a2</id>
<content type='text'>
Fixes build on 4xx stb03xxx when general purpose dma engine support is
enabled.

Signed-off-by: Matt Porter &lt;mporter@kernel.crashing.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: Fix MPC834x USB memory map offsets</title>
<updated>2005-08-08T22:29:13Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@freescale.com</email>
</author>
<published>2005-08-08T21:49:17Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=5e708484d710bcbb44893400f429579f5728cd7d'/>
<id>urn:sha1:5e708484d710bcbb44893400f429579f5728cd7d</id>
<content type='text'>
The memory mappings for MPC8349 USB MPH and DR modules were reversed.

Signed-off-by: Li Yang &lt;LeoLi@freescale.com&gt;
Signed-off-by: Jiang Bo &lt;Tanya.jiang@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;kumar.gala@freescale.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: 8xx commproc avoid direct pte manipulation, use dma coherent API instead</title>
<updated>2005-08-07T17:00:39Z</updated>
<author>
<name>Marcelo Tosatti</name>
<email>marcelo.tosatti@cyclades.com</email>
</author>
<published>2005-08-07T16:42:47Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=079da354db3473b56eb938ca53a2cb0804ea9c8c'/>
<id>urn:sha1:079da354db3473b56eb938ca53a2cb0804ea9c8c</id>
<content type='text'>
Touching the pte directly causes the 8Mbyte TLB entry to be invalidated.

This has been fixed in v2.4 for ages.

Signed-off-by: Marcelo Tosatti &lt;marcelo.tosatti@cyclades.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: add 440ep support</title>
<updated>2005-08-02T02:14:01Z</updated>
<author>
<name>Matt Porter</name>
<email>mporter@kernel.crashing.org</email>
</author>
<published>2005-08-01T05:34:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=c9cf73aee140baa425429902aaed2c758401343f'/>
<id>urn:sha1:c9cf73aee140baa425429902aaed2c758401343f</id>
<content type='text'>
Add PPC440EP core support.  PPC440EP is a PPC440-based SoC with a classic PPC
FPU and another set of peripherals.

Signed-off-by: Wade Farnsworth &lt;wfarnsworth@mvista.com&gt;
Signed-off-by: Matt Porter &lt;mporter@kernel.crashing.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: Fix typo in setup of 2nd PCI bus on 85xx</title>
<updated>2005-07-27T23:25:56Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@freescale.com</email>
</author>
<published>2005-07-27T18:44:10Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=127384524b31d99bc3f9e2d2e7af4a5fad572235'/>
<id>urn:sha1:127384524b31d99bc3f9e2d2e7af4a5fad572235</id>
<content type='text'>
Typo bug that was using PCI1 defines instead of PCI2 when setting up the
second PCI bus controller on 85xx based systems.  This hasn't been a real
issue since currently the PCI2 sizes are the same as the PCI1 sizes for
currently supported boards.

Thanks to Andrew Klossner @ Xerox for point this out.

Signed-off-by: Kumar Gala &lt;kumar.gala@freescale.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: fix compilation error with CONFIG_PQ2FADS</title>
<updated>2005-07-27T23:25:55Z</updated>
<author>
<name>Downing, Thomas</name>
<email>Thomas.Downing@ipc.com</email>
</author>
<published>2005-07-27T18:44:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=c41b72d5bd590e6ff781d6bdfc71595f3996bacf'/>
<id>urn:sha1:c41b72d5bd590e6ff781d6bdfc71595f3996bacf</id>
<content type='text'>
The 2.6.12.3 kernel compilation fails for ARCH=ppc when CONFIG_PQ2FADS=y.
This patch has been tested on Freescale PQ2FADS-ZU and -VR boards.

Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: Make the UARTs on MPC824x individual platform devices</title>
<updated>2005-07-27T23:25:55Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@freescale.com</email>
</author>
<published>2005-07-27T18:44:07Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=13e886c3b435d14668aefaed449d8d7ca6dce3a8'/>
<id>urn:sha1:13e886c3b435d14668aefaed449d8d7ca6dce3a8</id>
<content type='text'>
The UARTs on the MPC824x are unique devices and really shouldn't be thought
of as a DUART.  In addition, if both UARTs are in use we need to configure
the part to enable the 2nd UART since the pins for the UARTs are
multiplexed.  Adds support to run the 824x Sandpoint with both UARTs if
desired.

Signed-off-by: Matt McClintock &lt;msm@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;kumar.gala@freescale.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: Add proper prototype for cpm2_reset()</title>
<updated>2005-07-27T23:25:55Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@freescale.com</email>
</author>
<published>2005-07-27T18:44:06Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d054b5acfe1f68460fe70aff5028ad95a7a38140'/>
<id>urn:sha1:d054b5acfe1f68460fe70aff5028ad95a7a38140</id>
<content type='text'>
Added a proper prototype for cpm2_reset() which gets rid of a build
warning.

Signed-off-by: Jon Loeliger &lt;jdl@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;kumar.gala@freescale.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] openfirmware: generate device table for userspace</title>
<updated>2005-07-06T19:55:20Z</updated>
<author>
<name>Jeff Mahoney</name>
<email>jeffm@suse.com</email>
</author>
<published>2005-07-06T19:44:41Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=5e6557722e69840506eb8bc5a1edcdb4e447a917'/>
<id>urn:sha1:5e6557722e69840506eb8bc5a1edcdb4e447a917</id>
<content type='text'>
This converts the usage of struct of_match to struct of_device_id,
similar to pci_device_id.  This allows a device table to be generated,
which can be parsed by depmod(8) to generate a map file for module
loading.

In order for hotplug to work with macio devices, patches to
module-init-tools and hotplug must be applied.  Those patches are
available at:

 ftp://ftp.suse.com/pub/people/jeffm/linux/macio-hotplug/

Signed-off-by: Jeff Mahoney &lt;jeffm@suse.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] ppc32: explicitly disable 440GP IRQ compatibility mode in 440GX setup</title>
<updated>2005-07-06T02:18:59Z</updated>
<author>
<name>Eugene Surovegin</name>
<email>ebs@ebshome.net</email>
</author>
<published>2005-07-06T01:54:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=4b1294f928d9396e45f62b1c306ac8bf9fae036b'/>
<id>urn:sha1:4b1294f928d9396e45f62b1c306ac8bf9fae036b</id>
<content type='text'>
Add explicit disabling of 440GP IRQ compatibility mode when configuring
440GX interrupt controller.  This helps when board firmware for some reason
uses this compatibility mode and leaves it enabled.  It breaks 440GX
interrupt code because it assumes native 440GX IRQ mode.  People seems to
be continuously bitten by this.

Signed-off-by: Eugene Surovegin &lt;ebs@ebshome.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
</feed>
