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<title>linux/arch/powerpc/lib, branch v3.13.11</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/powerpc/lib?h=v3.13.11</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/powerpc/lib?h=v3.13.11'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-12-30T03:02:30Z</updated>
<entry>
<title>powerpc: Make 64-bit non-VMX __copy_tofrom_user bi-endian</title>
<updated>2013-12-30T03:02:30Z</updated>
<author>
<name>Paul E. McKenney</name>
<email>paulmck@linux.vnet.ibm.com</email>
</author>
<published>2013-12-17T22:29:57Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=20151169f1de4b170368fdb574024027620d0d49'/>
<id>urn:sha1:20151169f1de4b170368fdb574024027620d0d49</id>
<content type='text'>
The powerpc 64-bit __copy_tofrom_user() function uses shifts to handle
unaligned invocations.  However, these shifts were designed for
big-endian systems: On little-endian systems, they must shift in the
opposite direction.

This commit relies on the C preprocessor to insert the correct shifts
into the assembly code.

[ This is a rare but nasty LE issue. Most of the time we use the POWER7
optimised __copy_tofrom_user_power7 loop, but when it hits an exception
we fall back to the base __copy_tofrom_user loop. - Anton ]

Signed-off-by: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Add VMX optimised xor for RAID5</title>
<updated>2013-10-30T05:02:28Z</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2013-10-14T10:03:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ef1313deafb7baa6d3382044e962d5ad5e8c8dd6'/>
<id>urn:sha1:ef1313deafb7baa6d3382044e962d5ad5e8c8dd6</id>
<content type='text'>
Add a VMX optimised xor, used primarily for RAID5. On a POWER7 blade
this is a decent win:

   32regs    : 17932.800 MB/sec
   altivec   : 19724.800 MB/sec

The bigger gain is when the same test is run in SMT4 mode, as it
would if there was a lot of work going on:

   8regs     :  8377.600 MB/sec
   altivec   : 15801.600 MB/sec

I tested this against an array created without the patch, and also
verified it worked as expected on a little endian kernel.

[ Fix !CONFIG_ALTIVEC build -- BenH ]

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Fix Unaligned LE Floating Point Loads and Stores</title>
<updated>2013-10-30T05:01:36Z</updated>
<author>
<name>Tom Musta</name>
<email>tommusta@gmail.com</email>
</author>
<published>2013-10-18T19:44:17Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=dbc2fbd7c29a78724e761711d516930246c0e1c2'/>
<id>urn:sha1:dbc2fbd7c29a78724e761711d516930246c0e1c2</id>
<content type='text'>
This patch addresses unaligned single precision floating point loads
and stores in the single-step code.  The old implementation
improperly treated an 8 byte structure as an array of two 4 byte
words, which is a classic little endian bug.

Signed-off-by: Tom Musta &lt;tmusta@gmail.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Fix Unaligned Loads and Stores</title>
<updated>2013-10-30T05:01:30Z</updated>
<author>
<name>Tom Musta</name>
<email>tommusta@gmail.com</email>
</author>
<published>2013-10-18T19:42:08Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=6506b4718bb59c5d4e59235b81b5e13ea5d3c49a'/>
<id>urn:sha1:6506b4718bb59c5d4e59235b81b5e13ea5d3c49a</id>
<content type='text'>
This patch modifies the unaligned access routines of the sstep.c
module so that it properly reverses the bytes of storage operands
in the little endian kernel kernel.   This is implemented by
breaking an unaligned little endian access into a combination of
single byte accesses plus an overal byte reversal operation.

Signed-off-by: Tom Musta &lt;tmusta@gmail.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Use generic memcpy code in little endian</title>
<updated>2013-10-11T05:48:40Z</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2013-09-23T02:04:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=de577a356848a629b2c7f252ca3d1bc87375b52b'/>
<id>urn:sha1:de577a356848a629b2c7f252ca3d1bc87375b52b</id>
<content type='text'>
We need to fix some endian issues in our memcpy code. For now
just enable the generic memcpy routine for little endian builds.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Use generic checksum code in little endian</title>
<updated>2013-10-11T05:48:39Z</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2013-09-23T02:04:51Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7a332b0c9a59e0b0777dec55eefdda0f9a24ac52'/>
<id>urn:sha1:7a332b0c9a59e0b0777dec55eefdda0f9a24ac52</id>
<content type='text'>
We need to fix some endian issues in our checksum code. For now
just enable the generic checksum routines for little endian builds.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Fix endian issues in VMX copy loops</title>
<updated>2013-10-11T05:48:25Z</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2013-09-23T02:04:35Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=32ee1e188eadd7c997837649a107fd1c50feef7a'/>
<id>urn:sha1:32ee1e188eadd7c997837649a107fd1c50feef7a</id>
<content type='text'>
Fix the permute loops for little endian.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Restore registers on error exit from csum_partial_copy_generic()</title>
<updated>2013-10-03T07:22:42Z</updated>
<author>
<name>Paul E. McKenney</name>
<email>paulmck@linux.vnet.ibm.com</email>
</author>
<published>2013-10-01T07:11:35Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=8f21bd0090052e740944f9397e2be5ac7957ded7'/>
<id>urn:sha1:8f21bd0090052e740944f9397e2be5ac7957ded7</id>
<content type='text'>
The csum_partial_copy_generic() function saves the PowerPC non-volatile
r14, r15, and r16 registers for the main checksum-and-copy loop.
Unfortunately, it fails to restore them upon error exit from this loop,
which results in silent corruption of these registers in the presumably
rare event of an access exception within that loop.

This commit therefore restores these register on error exit from the loop.

Signed-off-by: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Fix parameter clobber in csum_partial_copy_generic()</title>
<updated>2013-10-03T07:22:36Z</updated>
<author>
<name>Paul E. McKenney</name>
<email>paulmck@linux.vnet.ibm.com</email>
</author>
<published>2013-10-01T06:54:05Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d9813c3681a36774b254c0cdc9cce53c9e22c756'/>
<id>urn:sha1:d9813c3681a36774b254c0cdc9cce53c9e22c756</id>
<content type='text'>
The csum_partial_copy_generic() uses register r7 to adjust the remaining
bytes to process.  Unfortunately, r7 also holds a parameter, namely the
address of the flag to set in case of access exceptions while reading
the source buffer.  Lacking a quantum implementation of PowerPC, this
commit instead uses register r9 to do the adjusting, leaving r7's
pointer uncorrupted.

Signed-off-by: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Remove ksp_limit on ppc64</title>
<updated>2013-09-25T04:15:51Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2013-09-24T05:17:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=cbc9565ee82694dec31d8137dec975b83175183b'/>
<id>urn:sha1:cbc9565ee82694dec31d8137dec975b83175183b</id>
<content type='text'>
We've been keeping that field in thread_struct for a while, it contains
the "limit" of the current stack pointer and is meant to be used for
detecting stack overflows.

It has a few problems however:

 - First, it was never actually *used* on 64-bit. Set and updated but
not actually exploited

 - When switching stack to/from irq and softirq stacks, it's update
is racy unless we hard disable interrupts, which is costly. This
is fine on 32-bit as we don't soft-disable there but not on 64-bit.

Thus rather than fixing 2 in order to implement 1 in some hypothetical
future, let's remove the code completely from 64-bit. In order to avoid
a clutter of ifdef's, we remove the updates from C code completely
during interrupt stack switching, and instead maintain it from the
asm helper that is used to do the stack switching in the first place.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
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