<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/mips/bcm63xx, branch v3.3</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/mips/bcm63xx?h=v3.3</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/mips/bcm63xx?h=v3.3'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-01-14T21:05:21Z</updated>
<entry>
<title>Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus</title>
<updated>2012-01-14T21:05:21Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-01-14T21:05:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=4964e0664c80680fa6b28ef91381c076a5b25c2c'/>
<id>urn:sha1:4964e0664c80680fa6b28ef91381c076a5b25c2c</id>
<content type='text'>
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits)
  MIPS: Delete unused function add_temporary_entry.
  MIPS: Set default pci cache line size.
  MIPS: Flush huge TLB
  MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
  MIPS: Octeon: Add support for OCTEON II PCIe
  MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
  MIPS: Alchemy: Update cpu-feature-overrides
  MIPS: Alchemy: db1200: Improve PB1200 detection.
  MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
  MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
  MIPS: Alchemy: irq: register pm at irq init time
  MIPS: Alchemy: Touchscreen support on DB1100
  MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
  net/irda: convert au1k_ir to platform driver.
  MIPS: Alchemy: remove unused board headers
  MTD: nand: make au1550nd.c a platform_driver
  MIPS: Netlogic: Mark Netlogic chips as SMT capable
  MIPS: Netlogic: Add support for XLP 3XX cores
  MIPS: Netlogic: Merge some of XLR/XLP wakup code
  MIPS: Netlogic: Add default XLP config.
  ...

Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c,
traps.c} and drivers/tty/serial/Makefile
</content>
</entry>
<entry>
<title>MIPS: BCM63XX: use the new bcm63xxpart parser</title>
<updated>2012-01-09T18:16:25Z</updated>
<author>
<name>Jonas Gorski</name>
<email>jonas.gorski@gmail.com</email>
</author>
<published>2011-12-05T15:08:10Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f4aa7adb8b11ae48b36474829b6debac7ed5ddd7'/>
<id>urn:sha1:f4aa7adb8b11ae48b36474829b6debac7ed5ddd7</id>
<content type='text'>
Signed-off-by: Jonas Gorski &lt;jonas.gorski@gmail.com&gt;
Acked-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Signed-off-by: Artem Bityutskiy &lt;Artem.Bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63XX: generate WLAN MAC address after registering ethernet devices.</title>
<updated>2011-12-07T22:03:04Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2011-11-16T18:49:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=b15a6d62b5482966d0605e24c728bea8f7f876eb'/>
<id>urn:sha1:b15a6d62b5482966d0605e24c728bea8f7f876eb</id>
<content type='text'>
In case the MAC address pool is not big enough to also register a WLAN device
prefer registering the Ethernet devices.

[ralf@linux-mips.org: Fixed formatting as per Sergei's complaint.]

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3013/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63xx: Fix GPIO set/get for BCM6345</title>
<updated>2011-12-07T22:03:04Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2011-11-16T18:11:21Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=92d9ae20269461deeefc46fbcdb8d428c4aa8d18'/>
<id>urn:sha1:92d9ae20269461deeefc46fbcdb8d428c4aa8d18</id>
<content type='text'>
On BCM6345, the register offsets for the set/get GPIO registers is wrong.
Use the same logic as the one present in arch/mips/bcm63xx/irq.c to
define the correct gpio_out_low_reg value when support for BCM6345
is compiled in.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3010/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63xx: Remove BCM6345 hacks to read base boot address</title>
<updated>2011-12-07T22:03:04Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2011-11-16T18:11:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e1c96c8620539f056291fe42f742f331f5d291b1'/>
<id>urn:sha1:e1c96c8620539f056291fe42f742f331f5d291b1</id>
<content type='text'>
Though BCM6345 does not technically have the same MPI register layout
than the other SoCs, reading the chip-select registers is done the same
way, and particularly for chip-select 0, which is the boot flash.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3009/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63xx: Fix SDRAM size computation for BCM6345</title>
<updated>2011-12-07T22:03:04Z</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2011-11-16T19:10:36Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d61fcfe2bbb27d4da18c609cf279627ae1b74151'/>
<id>urn:sha1:d61fcfe2bbb27d4da18c609cf279627ae1b74151</id>
<content type='text'>
Instead of hardcoding the amount of available RAM, read the number of
effective multiples of 8MB from SDRAM_MBASE_REG.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3008/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63XX: Add support for bcm6368 CPU.</title>
<updated>2011-12-07T22:03:04Z</updated>
<author>
<name>Maxime Bizon</name>
<email>mbizon@freebox.fr</email>
</author>
<published>2011-11-04T18:09:35Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=04712f3ff6e3a42ef658b55b0f99478f4f0682e3'/>
<id>urn:sha1:04712f3ff6e3a42ef658b55b0f99478f4f0682e3</id>
<content type='text'>
Signed-off-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63XX: Add external irq support for non 6348 CPUs.</title>
<updated>2011-12-07T22:03:04Z</updated>
<author>
<name>Maxime Bizon</name>
<email>mbizon@freebox.fr</email>
</author>
<published>2011-11-04T18:09:34Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=6224892c819e96898534c107c72b80a1a8e75abf'/>
<id>urn:sha1:6224892c819e96898534c107c72b80a1a8e75abf</id>
<content type='text'>
Signed-off-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2899/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63XX: Handle 64 bits irq stat register in irq code.</title>
<updated>2011-12-07T22:03:03Z</updated>
<author>
<name>Maxime Bizon</name>
<email>mbizon@freebox.fr</email>
</author>
<published>2011-11-04T18:09:33Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=71a43927b3bfe1a42cbf7bb174b170f06fa00a1a'/>
<id>urn:sha1:71a43927b3bfe1a42cbf7bb174b170f06fa00a1a</id>
<content type='text'>
bcm6368 has larger irq registers, prepare for this.

Signed-off-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2898/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63XX: Prepare irq code to handle different external irq hardware implementation.</title>
<updated>2011-12-07T22:03:03Z</updated>
<author>
<name>Maxime Bizon</name>
<email>mbizon@freebox.fr</email>
</author>
<published>2011-11-04T18:09:32Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=37c42a741f6c2c76dc5e61650e5d66dd20540aaf'/>
<id>urn:sha1:37c42a741f6c2c76dc5e61650e5d66dd20540aaf</id>
<content type='text'>
External irq only works for 6348, change code to prepare support of
other CPUs.

Signed-off-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2895/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
