linux/arch/microblaze/kernel/process.c, branch v3.2.2Linux kernel source treehttps://git.amat.us/linux/atom/arch/microblaze/kernel/process.c?h=v3.2.22011-10-14T10:28:42Zmicroblaze: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW usage2011-10-14T10:28:42ZPeter Zijlstrapeterz@infradead.org2011-08-24T13:32:31Zurn:sha1:84ac218f0257a0cfd7689d9a44f53118dbf307b3
As far as I can tell the only reason microblaze has
__ARCH_WANT_INTERRUPTS_ON_CTXSW is because it initializes new task state
with interrupts enabled so that on switch_to() interrupts get enabled.
So change copy_thread() to clear MSR_IE instead of set it, this will
ensure switch_to() will always keep IRQs disabled.
The scheduler will disable IRQs when taking rq->lock in schedule() and
enable IRQs in finish_lock_switch() after its done its magic.
This leaves ARM the only __ARCH_WANT_INTERRUPTS_ON_CTXSW user.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: exec: Remove redundant set_fs(USER_DS)2011-07-25T07:07:45ZMathias Krauseminipli@googlemail.com2011-06-10T13:09:59Zurn:sha1:a0ec99bda8d42001dc37191f1282a401d2f6e4e1
The address limit is already set in flush_old_exec() so this
set_fs(USER_DS) is redundant.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
microblaze: Remove r0_ram pointer and PTO alignment2011-03-09T07:09:54ZMichal Simekmonstr@monstr.eu2011-01-31T14:10:04Zurn:sha1:6e83557c38b40d6e9d1c82ad0ae59d8e5db9c50c
r0_ram pool was used for saving/restoring register
content if hw exception happen. This poll was replaced by
pt_pool_space with PT_SIZE size.
Based on this change SAVE_STATE_ARG_SPACE was removed which
caused that PTO offset is zero that's why is also removed.
r0_ram space was used as scratchpad by v850. In early
Microblaze Linux developing phase was this part of code
blindly copied.
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Do not trace cpu_relax function2010-08-04T08:22:36ZMichal Simekmonstr@monstr.eu2010-06-10T14:02:32Zurn:sha1:d0f140e03e38dc553a0bb61611c15fcede671f23
IRQsoff tracer requires to protect cpu_idle function
to get correct timing report.
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Adding likely macros2010-04-01T06:38:24ZMichal Simekmonstr@monstr.eu2010-03-23T14:37:02Zurn:sha1:78ebfa884bcef125464399f8d1cb05937bfeb6e1
On the base on GCOV analytics is helpful to add likely/unlikely
macros.
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Remove segment.h2010-04-01T06:38:19ZMichal Simekmonstr@monstr.eu2010-03-05T14:34:12Zurn:sha1:40db0834337ef0cde586feeb5588e45f0349098b
I would like to use asm-generic uaccess.h where are segment
macros defined. This is just first step.
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Move cache macro from cache.h to cacheflush.h2009-12-14T07:45:00ZMichal Simekmonstr@monstr.eu2009-10-15T13:18:13Zurn:sha1:a1f55113ca2130f775eeebe799a401619bfd0295
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: UMS is used only for MMU kernel2009-10-05T09:37:47ZMichal Simekmonstr@monstr.eu2009-09-25T09:52:50Zurn:sha1:f1ae3f6918ee4a437b4166a4deab4bd79629bc09
Signed-off-by: Michal Simek <monstr@monstr.eu>
microblaze: Ensure CPU usermode is set on new userspace processes2009-09-22T08:00:41ZJohn Williamsjohn.williams@petalogix.com2009-09-17T11:21:22Zurn:sha1:866d72295d52353eeb0c36ccd8e5813dca869265
Signed-off-by: John Williams <john.williams@petalogix.com>
microblaze_mmu_v2: Update process creation for MMU2009-05-26T14:45:18ZMichal Simekmonstr@monstr.eu2009-05-26T14:30:18Zurn:sha1:5233806dfe6f88fb1a01db3729eeda78f65bcbd1
Signed-off-by: Michal Simek <monstr@monstr.eu>