<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/microblaze/kernel/hw_exception_handler.S, branch v2.6.38</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/microblaze/kernel/hw_exception_handler.S?h=v2.6.38</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/microblaze/kernel/hw_exception_handler.S?h=v2.6.38'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2011-01-28T13:05:00Z</updated>
<entry>
<title>microblaze: Fix unaligned issue on MMU system with BS=0 DIV=1</title>
<updated>2011-01-28T13:05:00Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2011-01-28T12:14:58Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=9c749e177ccc0b3ee9589425c7255079e7a726fc'/>
<id>urn:sha1:9c749e177ccc0b3ee9589425c7255079e7a726fc</id>
<content type='text'>
Unaligned code use shift for finding register operand.
There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1
by
	ori rD, r0, (1 &lt;&lt; imm);	\
	idivu rD, rD, rA

but if rD is equal rA then ori instruction rewrite value which
should be devide.

The patch remove this macro which use idivu instruction because
idivu takes 32/34 cycles. The highest shifting is 20 which takes
20 cycles.

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Fix unaligned exception for little endian platform</title>
<updated>2011-01-03T09:08:29Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2010-12-29T13:34:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e3288f310111f7d18c323d95ae998765dee8c825'/>
<id>urn:sha1:e3288f310111f7d18c323d95ae998765dee8c825</id>
<content type='text'>
Half word unaligned accesses need to be fixed.

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Add stack unwinder</title>
<updated>2010-08-04T08:22:35Z</updated>
<author>
<name>Steven J. Magnani</name>
<email>steve@digidescorp.com</email>
</author>
<published>2010-04-27T17:37:54Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=ce3266c047389443d5f433d605c769e878cbe46e'/>
<id>urn:sha1:ce3266c047389443d5f433d605c769e878cbe46e</id>
<content type='text'>
Implement intelligent backtracing by searching for stack frame creation,
and emitting only return addresses. Use print_hex_dump() to display the
entire binary kernel stack.

Limitation: MMU kernels are not currently able to trace beyond a system trap
(interrupt, syscall, etc.). It is the intent of this patch to provide
infrastructure that can be extended to add this capability later.

Changes from V1:
* Removed checks in find_frame_creation() that prevented location of the frame
  creation instruction in heavily optimized code
* Various formatting/commenting/file location tweaks per review comments
* Dropped Kconfig option to enable STACKTRACE as something logically separate

Signed-off-by: Steven J. Magnani &lt;steve@digidescorp.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Use instruction with delay slot</title>
<updated>2010-04-01T06:38:23Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2010-03-22T19:43:27Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=3765d6958dfff34a15588e23c5d1274e1f6ba200'/>
<id>urn:sha1:3765d6958dfff34a15588e23c5d1274e1f6ba200</id>
<content type='text'>
Sync labels.

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Remove additional resr and rear loading</title>
<updated>2010-04-01T06:38:23Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2010-03-19T11:50:35Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=bd1637d63e82aaf732ffbe907ba887fa12e82df4'/>
<id>urn:sha1:bd1637d63e82aaf732ffbe907ba887fa12e82df4</id>
<content type='text'>
RESR and REAR uses the same regs in whole file.

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Change register usage for ESR and EAR</title>
<updated>2010-04-01T06:38:23Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2010-03-19T11:44:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=b175bcfe31cba846d8bfa35a3a4820667f7af383'/>
<id>urn:sha1:b175bcfe31cba846d8bfa35a3a4820667f7af383</id>
<content type='text'>
This change synchronize register usage in code.
ESR = R4
EAR = R3

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Prepare work for optimization in exception code</title>
<updated>2010-04-01T06:38:23Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2010-03-22T19:37:23Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7a6bbdc9304b45cc759e03623cbe63d81aff7337'/>
<id>urn:sha1:7a6bbdc9304b45cc759e03623cbe63d81aff7337</id>
<content type='text'>
Any sync branch must follow mts instructions not mfs.

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Add DEBUG option</title>
<updated>2010-04-01T06:38:23Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2010-03-18T06:23:04Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=708e7153d6fc4d2e5fe15c6ccc5d2907fe8a9c8d'/>
<id>urn:sha1:708e7153d6fc4d2e5fe15c6ccc5d2907fe8a9c8d</id>
<content type='text'>
Disable debug option in asm code.

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Clear sticky FSR register after saving it to func parametr</title>
<updated>2009-10-05T09:37:47Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2009-09-28T06:50:53Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=131e4e97bfee809dc64febe8accef2f042a92722'/>
<id>urn:sha1:131e4e97bfee809dc64febe8accef2f042a92722</id>
<content type='text'>
Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear
it for noMMU kernel. This one do it for MMU.

Correct noMMU version

Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
</content>
</entry>
<entry>
<title>microblaze: Clear sticky FSR register after generating exception signals</title>
<updated>2009-09-22T08:00:42Z</updated>
<author>
<name>John Williams</name>
<email>john.williams@petalogix.com</email>
</author>
<published>2009-09-15T02:29:55Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=71b23d547b5a06f49acacaf742ebf1a85673f8d1'/>
<id>urn:sha1:71b23d547b5a06f49acacaf742ebf1a85673f8d1</id>
<content type='text'>
FSR is sticky, so after the userspace exception/signal generation, clear
it ready for next time.

Signed-off-by: John Williams &lt;john.williams@petalogix.com&gt;
</content>
</entry>
</feed>
