linux/arch/arm64, branch v3.7

open*(2) compat fixes (s390, arm64)

2012-12-02T18:46:38Z

The usual rules for open()/openat()/open_by_handle_at() are 1) native 32bit - don't force O_LARGEFILE in flags 2) native 64bit - force O_LARGEFILE in flags 3) compat on 64bit host - as for native 32bit 4) native 32bit ABI for 64bit system (mips/n32, x86/x32) - as for native 64bit There are only two exceptions - s390 compat has open() forcing O_LARGEFILE and arm64 compat has open_by_handle_at() doing the same thing. The same binaries on native host (s390/31 and arm resp.) will *not* force O_LARGEFILE, so IMO both are emulation bugs. Objections? The fix is obvious... Signed-off-by: Al Viro Signed-off-by: Linus Torvalds

arm64: Distinguish between user and kernel XN bits

2012-11-16T15:50:25Z

On AArch64, the meaning of the XN bit has changed to UXN (user). The PXN (privileged) bit must be set to prevent kernel execution. Without the PXN bit set, the CPU may speculatively access device memory. This patch ensures that all the mappings that the kernel must not execute from (including user mappings) have the PXN bit set. Signed-off-by: Catalin Marinas

arm64: mm: fix booting on systems with no memory below 4GB

2012-11-08T16:06:21Z

Booting on a system with all of its memory above the 4GB boundary breaks for two reasons: (1) We still try to create a non-empty DMA32 zone (2) no-bootmem limits allocations to 0xffffffff This patch fixes these issues for ARM64. Tested-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas

arm64: smp: add missing completion for secondary boot

2012-11-08T16:06:21Z

Commit 149c24151e85 ("ARM: SMP: use a timing out completion for cpu hotplug") modified arm's CPU up path to use completions. It seems that we only got half of this patch for arm64, so add the missing call to complete. Reported-by: Jon Brawn Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas

arm64: compat: select CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION

2012-11-08T16:06:20Z

Commit c1d7e01d7877 ("ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSION") replaced the __ARCH_WANT_COMPAT_IPC_PARSE_VERSION token with a corresponding Kconfig option instead. This patch updates arm64 to use the latter, rather than #define an unused token. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas

arm64: elf: fix core dumping definitions for GP and FP registers

2012-11-08T16:06:20Z

struct user_fp does not exist for arm64, so use struct user_fpsimd_state instead for the ELF core dumping definitions. Furthermore, since we use regset-based core dumping, we do not need definitions for dump_task_regs and dump_fpu. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas

arm64: perf: use architected event for CPU cycle counter

2012-11-08T16:06:19Z

We currently use a fake event encoding (0xFF) to indicate CPU cycles so that we don't waste an event counter and can target the hardware cycle counter instead. The problem with this approach is that the event space defined by the architecture permits an implementation to allocate 0xFF for some other event. This patch uses the architected cycle counter encoding (0x11) so that we avoid potentially clashing with event encodings on future CPU implementations. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas

arm64: Move PCI_IOBASE closer to MODULES_VADDR

2012-10-23T14:30:51Z

This is to reuse the same pmd table that is sparsely populated with the modules space. Signed-off-by: Catalin Marinas

arm64: Use pgprot_t as the last argument when invoking __ioremap()

2012-10-23T14:30:47Z

Even if it works with since the types have the same size, the correct type of the last __ioremap() argument is pgprot_t rather than pteval_t. Signed-off-by: Catalin Marinas

arm64: fix alignment padding in assembly code

2012-10-20T10:12:01Z

An interesting effect of using the generic version of linkage.h is that the padding is defined in terms of x86 NOPs, which can have even more interesting effects when the assembly code looks like this: ENTRY(func1) mov x0, xzr ENDPROC(func1) // fall through ENTRY(func2) mov x0, #1 ret ENDPROC(func2) Admittedly, the code is not very nice. But having code from another architecture doesn't look completely sane either. The fix is to add arm64's version of linkage.h, which causes the insertion of proper AArch64 NOPs. Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas