linux/arch/arm64/lib, branch v3.11-rc2Linux kernel source treehttps://git.amat.us/linux/atom/arch/arm64/lib?h=v3.11-rc22013-05-08T09:33:17Zarm64: Treat the bitops index argument as an 'int'2013-05-08T09:33:17ZCatalin Marinascatalin.marinas@arm.com2013-05-07T17:02:58Zurn:sha1:420c158dcf96ee3a5758c9bf1586b163584c75c7
The bitops prototype use an 'int' as the bit index type but the asm
implementation assume it to be a 'long'. Since the compiler does not
guarantee zeroing the upper 32-bits in a register when used as 'int',
change the bitops implementation accordingly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arm64: Use acquire/release semantics instead of explicit DMB2013-04-30T14:58:37ZCatalin Marinascatalin.marinas@arm.com2013-04-30T14:58:37Zurn:sha1:16c85a1fd73eade2ae290d759924c09b4595f504
This patch changes the test_and_*_bit functions to use the
load-acquire/store-release instructions instead of explicit DMB.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arm64: klib: bitops: fix unpredictable stxr usage2013-04-30T14:53:01ZMark Rutlandmark.rutland@arm.com2013-04-30T10:11:15Zurn:sha1:c47d6a04e6ed22ccc5d89aaf2a136bf4971de310
We're currently relying on unpredictable behaviour in our testops
(test_and_*_bit), as stxr is unpredictable when the status register and
the source register are the same
This patch changes reallocates the status register so as to bring us back into
the realm of predictable behaviour. Boot tested on an AEMv8 model.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arm64: klib: Optimised atomic bitops2013-03-21T17:39:31ZCatalin Marinascatalin.marinas@arm.com2013-03-21T16:28:47Zurn:sha1:62479586532715b6da4777374a6f53b32453385e
This patch implements the AArch64-specific atomic bitops functions using
exclusive memory accesses to avoid locking.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arm64: klib: Optimised string functions2013-03-21T17:39:30ZCatalin Marinascatalin.marinas@arm.com2013-03-21T16:23:43Zurn:sha1:2b8cac814cd5a0a305d62dcd1d589faccb705a4d
This patch introduces AArch64-specific string functions (strchr,
strrchr).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arm64: klib: Optimised memory functions2013-03-21T17:39:29ZCatalin Marinascatalin.marinas@arm.com2013-03-21T16:16:43Zurn:sha1:4a8992271c843cb5bcd3321bf6a02eb251280b1d
This patch introduces AArch64-specific memory functions (memcpy,
memmove, memchr, memset). These functions are not optimised for any CPU
implementation but can be used as a starting point once hardware is
available.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arm64: Miscellaneous library functions2012-09-17T12:42:18ZMarc Zyngiermarc.zyngier@arm.com2012-03-05T11:49:33Zurn:sha1:f27bb139c3876806a2c82e979d2dbbece44c66df
This patch adds udelay, memory and bit operations together with the
ksyms exports.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
arm64: User access library functions2012-09-17T12:42:11ZCatalin Marinascatalin.marinas@arm.com2012-03-05T11:49:32Zurn:sha1:0aea86a2176c22647a5b683768f858d880d5e05b
This patch add support for various user access functions. These
functions use the standard LDR/STR instructions and not the LDRT/STRT
variants in order to allow kernel addresses (after set_fs(KERNEL_DS)).
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>