<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/arm/kernel/sleep.S, branch v3.7.4</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/arm/kernel/sleep.S?h=v3.7.4</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/arm/kernel/sleep.S?h=v3.7.4'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2012-03-28T17:30:01Z</updated>
<entry>
<title>Disintegrate asm/system.h for ARM</title>
<updated>2012-03-28T17:30:01Z</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-03-28T17:30:01Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=9f97da78bf018206fb623cd351d454af2f105fe0'/>
<id>urn:sha1:9f97da78bf018206fb623cd351d454af2f105fe0</id>
<content type='text'>
Disintegrate asm/system.h for ARM.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: Russell King &lt;linux@arm.linux.org.uk&gt;
cc: linux-arm-kernel@lists.infradead.org
</content>
</entry>
<entry>
<title>ARM: LPAE: add ISBs around MMU enabling code</title>
<updated>2011-12-08T10:30:38Z</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2011-11-22T17:30:28Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=d675d0bc47f28c5414fbbe17fcc801f69c45b960'/>
<id>urn:sha1:d675d0bc47f28c5414fbbe17fcc801f69c45b960</id>
<content type='text'>
Before we enable the MMU, we must ensure that the TTBR registers contain
sane values. After the MMU has been enabled, we jump to the *virtual*
address of the following function, so we also need to ensure that the
SCTLR write has taken effect.

This patch adds ISB instructions around the SCTLR write to ensure the
visibility of the above.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: suspend: use idmap_pgd instead of suspend_pgd</title>
<updated>2011-12-06T14:04:14Z</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2011-11-15T11:11:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e6eadc67873d5f363c864cd7723104e7d47dcb44'/>
<id>urn:sha1:e6eadc67873d5f363c864cd7723104e7d47dcb44</id>
<content type='text'>
The ARM CPU suspend code requires cpu_resume_mmu to be identity mapped
in order to re-enable the MMU when coming out of suspend. Currently,
this is accomplished by maintaining a suspend_pgd with the relevant
mapping put in place at init time.

This patch replaces the use of suspend_pgd with the new idmap_pgd.
cpu_resume_mmu is placed in the .idmap.text section so that it is
included in the identity map.

Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Dave Martin &lt;dave.martin@linaro.org&gt;
Tested-by: Lorenzo Pieralisi &lt;Lorenzo.Pieralisi@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: pm: convert some assembly to C</title>
<updated>2011-09-20T22:33:44Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-09-01T10:52:33Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=abda1bd5f4e04054ce083c298fcd68a743e9df03'/>
<id>urn:sha1:abda1bd5f4e04054ce083c298fcd68a743e9df03</id>
<content type='text'>
Convert some of the sleep.S guts to C code, which makes it easier to
use our macros and to add L2 cache handling.  We provide a helper
function, __cpu_suspend_save(), which deals with saving the common
state, setting up for resume, and flushing caches.

The remainder left as assembly code is the saving of the CPU general
purpose registers, and allocating space on the stack to save the CPU
specific registers and resume state.

Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: pm: get rid of cpu_resume_turn_mmu_on</title>
<updated>2011-09-20T22:33:42Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-08-31T22:26:18Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=62b2d07c0ea9db40a1787d2d0ab49f03c3e0613c'/>
<id>urn:sha1:62b2d07c0ea9db40a1787d2d0ab49f03c3e0613c</id>
<content type='text'>
We don't require cpu_resume_turn_mmu_on as we can combine the ldr
instruction with the following code provided we ensure that
cpu_resume_mmu is aligned for older CPUs.  Note that we also align
to a 32-byte boundary to ensure that the code can't cross a section
boundary.

Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: pm: only use preallocated page table during resume</title>
<updated>2011-09-20T22:33:38Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-08-27T21:39:09Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=de8e71ca4f2e17329f6718ae88d5c8336cb249ee'/>
<id>urn:sha1:de8e71ca4f2e17329f6718ae88d5c8336cb249ee</id>
<content type='text'>
Only use the preallocated page table during the resume, not while
suspending.  This avoids the overhead of having to switch unnecessarily
to the resume page table in the suspend path.

Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: pm: preallocate a page table for suspend/resume</title>
<updated>2011-09-20T22:33:36Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-08-26T19:28:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e8ce0eb5e2254b85415e4b58e73f24a5d13846a1'/>
<id>urn:sha1:e8ce0eb5e2254b85415e4b58e73f24a5d13846a1</id>
<content type='text'>
Preallocate a page table and setup an identity mapping for the MMU
enable code.  This means we don't have to "borrow" a page table to
do this, avoiding complexities with L2 cache coherency.

Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: pm: force non-zero return value from __cpu_suspend when aborting</title>
<updated>2011-09-20T22:33:28Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-08-27T10:17:36Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=f5fa68d9674156ddaafa12a058ccc93c8866d5f9'/>
<id>urn:sha1:f5fa68d9674156ddaafa12a058ccc93c8866d5f9</id>
<content type='text'>
Ensure that the return value from __cpu_suspend is non-zero when
aborting.  Zero indicates a successful suspend occurred.

Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Tested-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: pm: allow suspend finisher to return error codes</title>
<updated>2011-07-02T08:54:01Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-07-02T08:54:01Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=29cb3cd208dd0e4471bb80bec4facc49ceb199fa'/>
<id>urn:sha1:29cb3cd208dd0e4471bb80bec4facc49ceb199fa</id>
<content type='text'>
There are SoCs where attempting to enter a low power state is ignored,
and the CPU continues executing instructions with all state preserved.
It is over-complex at that point to disable the MMU just to call the
resume path.

Instead, allow the suspend finisher to return error codes to abort
suspend in this circumstance, where the cpu_suspend internals will then
unwind the saved state on the stack.  Also omit the tlb flush as no
changes to the page tables will have happened.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: pm: hide 1st and 2nd arguments to cpu_suspend from platform code</title>
<updated>2011-06-24T08:54:39Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2011-06-22T16:41:48Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=2c74a0cefa463a7a483b07ba4d2ea8e4ec7b996c'/>
<id>urn:sha1:2c74a0cefa463a7a483b07ba4d2ea8e4ec7b996c</id>
<content type='text'>
The first and second arguments shouldn't concern platform code, so
hide them from each platforms caller.

Tested-by: Kevin Hilman &lt;khilman@ti.com&gt;
Acked-by: Jean Pihet &lt;j-pihet@ti.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
</feed>
