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<title>linux/arch/arc/kernel, branch v3.12-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<id>https://git.amat.us/linux/atom/arch/arc/kernel?h=v3.12-rc2</id>
<link rel='self' href='https://git.amat.us/linux/atom/arch/arc/kernel?h=v3.12-rc2'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/'/>
<updated>2013-09-12T14:40:08Z</updated>
<entry>
<title>ARC: SMP failed to boot due to missing IVT setup</title>
<updated>2013-09-12T14:40:08Z</updated>
<author>
<name>Noam Camus</name>
<email>noamc@ezchip.com</email>
</author>
<published>2013-09-12T07:37:39Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=c3567f8a359b7917dcffa442301f88ed0a75211f'/>
<id>urn:sha1:c3567f8a359b7917dcffa442301f88ed0a75211f</id>
<content type='text'>
Commit 05b016ecf5e7a "ARC: Setup Vector Table Base in early boot" moved
the Interrupt vector Table setup out of arc_init_IRQ() which is called
for all CPUs, to entry point of boot cpu only, breaking booting of others.

Fix by adding the same to entry point of non-boot CPUs too.

read_arc_build_cfg_regs() printing IVT Base Register didn't help the
casue since it prints a synthetic value if zero which is totally bogus,
so fix that to print the exact Register.

[vgupta: Remove the now stale comment from header of arc_init_IRQ and
also added the commentary for halt-on-reset]

Cc: Gilad Ben-Yossef &lt;gilad@benyossef.com&gt;
Cc: Cc: &lt;stable@vger.kernel.org&gt; #3.11
Signed-off-by: Noam Camus &lt;noamc@ezchip.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux</title>
<updated>2013-09-10T20:53:52Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-09-10T20:53:52Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=31f7c3a688f75bceaf2fd009efc489659ad6aa61'/>
<id>urn:sha1:31f7c3a688f75bceaf2fd009efc489659ad6aa61</id>
<content type='text'>
Pull device tree core updates from Grant Likely:
 "Generally minor changes.  A bunch of bug fixes, particularly for
  initialization and some refactoring.  Most notable change if feeding
  the entire flattened tree into the random pool at boot.  May not be
  significant, but shouldn't hurt either"

Tim Bird questions whether the boot time cost of the random feeding may
be noticeable.  And "add_device_randomness()" is definitely not some
speed deamon of a function.

* tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux:
  of/platform: add error reporting to of_amba_device_create()
  irq/of: Fix comment typo for irq_of_parse_and_map
  of: Feed entire flattened device tree into the random pool
  of/fdt: Clean up casting in unflattening path
  of/fdt: Remove duplicate memory clearing on FDT unflattening
  gpio: implement gpio-ranges binding document fix
  of: call __of_parse_phandle_with_args from of_parse_phandle
  of: introduce of_parse_phandle_with_fixed_args
  of: move of_parse_phandle()
  of: move documentation of of_parse_phandle_with_args
  of: Fix missing memory initialization on FDT unflattening
  of: consolidate definition of early_init_dt_alloc_memory_arch()
  of: Make of_get_phy_mode() return int i.s.o. const int
  include: dt-binding: input: create a DT header defining key codes.
  of/platform: Staticize of_platform_device_create_pdata()
  of: Specify initrd location using 64-bit
  dt: Typo fix
  OF: make of_property_for_each_{u32|string}() use parameters if OF is not enabled
</content>
</entry>
<entry>
<title>ARC: remove console_verbose() from setup_arch()</title>
<updated>2013-09-05T05:01:12Z</updated>
<author>
<name>Mischa Jonker</name>
<email>mjonker@synopsys.com</email>
</author>
<published>2013-08-28T18:38:18Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=8508d5653f4ca25cd13f87340121afdfed448e1b'/>
<id>urn:sha1:8508d5653f4ca25cd13f87340121afdfed448e1b</id>
<content type='text'>
It prevents kernel parameters such as 'loglevel' from doing their job.

Signed-off-by: Mischa Jonker &lt;mjonker@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Handle un-aligned user space access in BE.</title>
<updated>2013-09-05T05:01:11Z</updated>
<author>
<name>Noam Camus</name>
<email>noamc@ezchip.com</email>
</author>
<published>2012-09-10T12:13:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=7d669a193bc0f44c20054687a3bf9ff82ad001a7'/>
<id>urn:sha1:7d669a193bc0f44c20054687a3bf9ff82ad001a7</id>
<content type='text'>
Adding endian awarness to un-aligned access exception handling.

Signed-off-by: Noam Camus &lt;noamc@ezchip.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>of: consolidate definition of early_init_dt_alloc_memory_arch()</title>
<updated>2013-08-28T20:18:32Z</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@linaro.org</email>
</author>
<published>2013-08-28T20:18:32Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=a1727da599ad030ccaf4073473fd235c8ee28219'/>
<id>urn:sha1:a1727da599ad030ccaf4073473fd235c8ee28219</id>
<content type='text'>
Most architectures use the same implementation. Collapse the common ones
into a single weak function that can be overridden.

Signed-off-by: Grant Likely &lt;grant.likely@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVE</title>
<updated>2013-08-26T04:10:25Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-07-09T11:36:40Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=fce16bc35ae4a45634f3dc348d8d297a25c277cf'/>
<id>urn:sha1:fce16bc35ae4a45634f3dc348d8d297a25c277cf</id>
<content type='text'>
In the exception return path, for both U/K cases, intr are already
disabled (for various existing reasons). So when we drop down to
@restore_regs, we need not redo that.

There was subtle issue - when intr were NOT being disabled for
ret-to-kernel-but-no-preemption case - now fixed by moving the
IRQ_DISABLE further up in @resume_kernel_mode.

So what do we gain:

* Shaves off a few insn in return path.

* Eliminates the need for IRQ_DISABLE_SAVE assembler macro for ARCv2
  hence allows for entry code sharing.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Exception Handlers Code consolidation</title>
<updated>2013-08-26T04:10:25Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-07-09T09:37:13Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=37f3ac498c988536f0d42b4659fb5d2c050b2f96'/>
<id>urn:sha1:37f3ac498c988536f0d42b4659fb5d2c050b2f96</id>
<content type='text'>
After the recent cleanups, all the exception handlers now have same
boilerplate prologue code. Move that into common macro.

This reduces readability but helps greatly with sharing / duplicating
entry code with ARCv2 ISA where the handlers are pretty much the same,
just the entry prologue is different (due to hardware assist).

Also while at it, add the missing FAKE_RET_FROM_EXCPN calls in couple of
places to drop down to pure kernel mode (from exception mode) before
jumping off into "C" code.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Add some .gitignore entries</title>
<updated>2013-08-26T04:10:24Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-07-09T10:25:15Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=fe240f11cdab5831d0c4c1ecbaab00b7d302f295'/>
<id>urn:sha1:fe240f11cdab5831d0c4c1ecbaab00b7d302f295</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc</title>
<updated>2013-07-03T18:09:27Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-07-03T18:09:27Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=76d3f4c27d3c2c85e5cfe731537b6929145bf652'/>
<id>urn:sha1:76d3f4c27d3c2c85e5cfe731537b6929145bf652</id>
<content type='text'>
Pull first batch of ARC changes from Vineet Gupta:
 "There's a second bunch to follow next week - which depends on commits
  on other trees (irq/net).  I'd have preferred the accompanying ARC
  change via respective trees, but it didn't workout somehow.

  Highlights of changes:

   - Continuation of ARC MM changes from 3.10 including

       zero page optimization
       Setting pagecache pages dirty by default
       Non executable stack by default
       Reducing dcache flushes for aliasing VIPT config

   - Long overdue rework of pt_regs machinery - removing the unused word
     gutters and adding ECR register to baseline (helps cleanup lot of
     low level code)

   - Support for ARC gcc 4.8

   - Few other preventive fixes, cosmetics, usage of Kconfig helper..

  The diffstat is larger than normal primarily because of arcregs.h
  header split as well as beautification of macros in entry.h"

* tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (32 commits)
  ARC: warn on improper stack unwind FDE entries
  arc: delete __cpuinit usage from all arc files
  ARC: [tlb-miss] Fix bug with CONFIG_ARC_DBG_TLB_MISS_COUNT
  ARC: [tlb-miss] Extraneous PTE bit testing/setting
  ARC: Adjustments for gcc 4.8
  ARC: Setup Vector Table Base in early boot
  ARC: Remove explicit passing around of ECR
  ARC: pt_regs update #5: Use real ECR for pt_regs-&gt;event vs. synth values
  ARC: stop using pt_regs-&gt;orig_r8
  ARC: pt_regs update #4: r25 saved/restored unconditionally
  ARC: K/U SP saved from one location in stack switching macro
  ARC: Entry Handler tweaks: Simplify branch for in-kernel preemption
  ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR values
  ARC: Increase readability of entry handlers
  ARC: pt_regs update #3: Remove unused gutter at start of callee_regs
  ARC: pt_regs update #2: Remove unused gutter at start of pt_regs
  ARC: pt_regs update #1: Align pt_regs end with end of kernel stack page
  ARC: pt_regs update #0: remove kernel stack canary
  ARC: [mm] Remove @write argument to do_page_fault()
  ARC: [mm] Make stack/heap Non-executable by default
  ...
</content>
</entry>
<entry>
<title>more open-coded file_inode() calls</title>
<updated>2013-06-29T08:57:21Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2013-06-16T13:25:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/linux/commit/?id=e77e43003382e46c673c9f82b5f2df8058d3c527'/>
<id>urn:sha1:e77e43003382e46c673c9f82b5f2df8058d3c527</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
</feed>
