linux/arch/arc/include/asm/cache.h, branch v3.10.39

ARC: [mm] Aliasing VIPT dcache support 4/4

2013-05-09T16:30:57Z

Enforce congruency of userspace shared mappings Signed-off-by: Vineet Gupta

ARC: Cache Flush Management

2013-02-15T17:45:50Z

* ARC700 has VIPT L1 Caches * Caches don't snoop and are not coherent * Given the PAGE_SIZE and Cache associativity, we don't support aliasing D$ configurations (yet), but do allow aliasing I$ configs Signed-off-by: Vineet Gupta

ARC: Fundamental ARCH data-types/defines

2013-02-11T14:30:34Z

* L1_CACHE_SHIFT * PAGE_SIZE, PAGE_OFFSET * struct pt_regs, struct user_regs_struct * struct thread_struct, cpu_relax(), task_pt_regs(), start_thread(), ... * struct thread_info, THREAD_SIZE, INIT_THREAD_INFO(), TIF_*, ... * BUG() * ELF_* * Elf_* To disallow user-space visibility into some of the core kernel data-types such as struct pt_regs, #ifdef __KERNEL__ which also makes the UAPI header spit (further patch in the series) to NOT export it to asm/uapi/ptrace.h Signed-off-by: Vineet Gupta Cc: Jonas Bonn Cc: Al Viro Acked-by: Arnd Bergmann