From c76909abfec876c6b751d693ebd3df07df686aa0 Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Fri, 25 Sep 2009 20:36:54 +0000
Subject: Improve MachineMemOperand handling.  - Allocate MachineMemOperands
 and MachineMemOperand lists in MachineFunctions.    This eliminates
 MachineInstr's std::list member and allows the data to be    created by isel
 and live for the remainder of codegen, avoiding a lot of    copying and
 unnecessary translation. This also shrinks MemSDNode.  - Delete
 MemOperandSDNode. Introduce MachineSDNode which has dedicated    fields for
 MachineMemOperands.  - Change MemSDNode to have a MachineMemOperand member
 instead of its own    fields with the same information. This introduces some
 redundancy, but    it's more consistent with what MachineInstr will
 eventually want.  - Ignore alignment when searching for redundant loads for
 CSE, but remember    the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
---
 utils/TableGen/DAGISelEmitter.cpp | 29 +++++++++++------------------
 1 file changed, 11 insertions(+), 18 deletions(-)

(limited to 'utils/TableGen')

diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index 2488a96ea2..dcf64e444c 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -1135,24 +1135,18 @@ public:
         emitCode("}");
       }
 
-      // Generate MemOperandSDNodes nodes for each memory accesses covered by 
+      // Populate MemRefs with entries for each memory accesses covered by 
       // this pattern.
-      if (II.mayLoad | II.mayStore) {
-        std::vector<std::string>::const_iterator mi, mie;
-        for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
-          std::string LSIName = "LSI_" + *mi;
-          emitCode("SDValue " + LSIName + " = "
-                   "CurDAG->getMemOperand(cast<MemSDNode>(" +
-                   *mi + ")->getMemOperand());");
-          if (GenDebug) {
-            emitCode("CurDAG->setSubgraphColor(" + LSIName +".getNode(), \"yellow\");");
-            emitCode("CurDAG->setSubgraphColor(" + LSIName +".getNode(), \"black\");");
-          }
-          if (IsVariadic)
-            emitCode("Ops" + utostr(OpsNo) + ".push_back(" + LSIName + ");");
-          else
-            AllOps.push_back(LSIName);
-        }
+      if (isRoot && !LSI.empty()) {
+        std::string MemRefs = "MemRefs" + utostr(OpsNo);
+        emitCode("MachineSDNode::mmo_iterator " + MemRefs + " = "
+                 "MF->allocateMemRefsArray(" + utostr(LSI.size()) + ");");
+        for (unsigned i = 0, e = LSI.size(); i != e; ++i)
+          emitCode(MemRefs + "[" + utostr(i) + "] = "
+                   "cast<MemSDNode>(" + LSI[i] + ")->getMemOperand();");
+        After.push_back("cast<MachineSDNode>(ResNode)->setMemRefs(" +
+                        MemRefs + ", " + MemRefs + " + " + utostr(LSI.size()) +
+                        ");");
       }
 
       if (NodeHasChain) {
@@ -1965,7 +1959,6 @@ void DAGISelEmitter::EmitInstructionSelector(raw_ostream &OS) {
      << "    assert(!N.isMachineOpcode() && \"Node already selected!\");\n"
      << "    break;\n"
      << "  case ISD::EntryToken:       // These nodes remain the same.\n"
-     << "  case ISD::MEMOPERAND:\n"
      << "  case ISD::BasicBlock:\n"
      << "  case ISD::Register:\n"
      << "  case ISD::HANDLENODE:\n"
-- 
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