From b5923db192d2aa938ff3c12aaac87d80ab649625 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 11 Jun 2011 00:28:06 +0000 Subject: Move the list of registers into CodeGenRegBank. Also move the sub-register index computations from RegisterInfoEmitter into CodeGenRegBank. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132865 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenTarget.cpp | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) (limited to 'utils/TableGen/CodeGenTarget.cpp') diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index e337b56406..a0c64ffa8c 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -163,19 +163,6 @@ CodeGenRegBank &CodeGenTarget::getRegBank() const { return *RegBank; } -void CodeGenTarget::ReadRegisters() const { - std::vector Regs = Records.getAllDerivedDefinitions("Register"); - if (Regs.empty()) - throw std::string("No 'Register' subclasses defined!"); - std::sort(Regs.begin(), Regs.end(), LessRecord()); - - Registers.reserve(Regs.size()); - Registers.assign(Regs.begin(), Regs.end()); - // Assign the enumeration values. - for (unsigned i = 0, e = Registers.size(); i != e; ++i) - Registers[i].EnumValue = i + 1; -} - void CodeGenTarget::ReadRegisterClasses() const { std::vector RegClasses = Records.getAllDerivedDefinitions("RegisterClass"); @@ -189,7 +176,7 @@ void CodeGenTarget::ReadRegisterClasses() const { /// getRegisterByName - If there is a register with the specific AsmName, /// return it. const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { - const std::vector &Regs = getRegisters(); + const std::vector &Regs = getRegBank().getRegisters(); for (unsigned i = 0, e = Regs.size(); i != e; ++i) { const CodeGenRegister &Reg = Regs[i]; if (Reg.TheDef->getValueAsString("AsmName") == Name) -- cgit v1.2.3-70-g09d2