From f52baf72c116d9cf8680d25a8e751ce354c7d44b Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 29 May 2012 23:40:00 +0000 Subject: Emit register unit lists for each register. Register units are already used internally in TableGen to compute register pressure sets and overlapping registers. This patch makes them available to the code generators. The register unit lists are differentially encoded so they can be reused for many related registers. This keeps the total size of the lists below 200 bytes for most targets. ARM has the largest table at 560 bytes. Add an MCRegUnitIterator for traversing the register unit lists. It provides an abstract interface so the representation can be changed in the future without changing all clients. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157650 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenRegisters.cpp | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'utils/TableGen/CodeGenRegisters.cpp') diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index 2b064aa307..887f01bdfa 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -83,6 +83,7 @@ CodeGenRegister::CodeGenRegister(Record *R, unsigned Enum) EnumValue(Enum), CostPerUse(R->getValueAsInt("CostPerUse")), CoveredBySubRegs(R->getValueAsBit("CoveredBySubRegs")), + NumNativeRegUnits(0), SubRegsComplete(false), SuperRegsComplete(false), TopoSig(~0u) @@ -397,6 +398,10 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { if (RegUnits.empty()) RegUnits.push_back(RegBank.newRegUnit(this)); + // We have now computed the native register units. More may be adopted later + // for balancing purposes. + NumNativeRegUnits = RegUnits.size(); + return SubRegs; } -- cgit v1.2.3-70-g09d2