From ae1920b1efa72c1789d562df4746110d0c2e10bd Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 15 Jun 2011 04:50:36 +0000 Subject: Give CodeGenRegisterClass a real sorted member set. Make the Elements vector private and expose an ArrayRef through getOrder() instead. getOrder will eventually provide multiple user-specified allocation orders. Use the sorted member set for member and subclass tests. Clean up a lot of ad hoc searches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133040 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenInstruction.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'utils/TableGen/CodeGenInstruction.cpp') diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp index 5b0aedfbc8..73fe916258 100644 --- a/utils/TableGen/CodeGenInstruction.cpp +++ b/utils/TableGen/CodeGenInstruction.cpp @@ -417,7 +417,8 @@ bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, if (!InstOpRec->isSubClassOf("RegisterClass")) return false; - if (!T.getRegisterClass(InstOpRec).containsRegister(ADI->getDef())) + if (!T.getRegisterClass(InstOpRec) + .contains(T.getRegBank().getReg(ADI->getDef()))) throw TGError(Loc, "fixed register " +ADI->getDef()->getName() + " is not a member of the " + InstOpRec->getName() + " register class!"); -- cgit v1.2.3-70-g09d2