From d2b1fb27df44151e153c19055ad1bd4b415b1e9d Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 22 Feb 2008 05:18:04 +0000 Subject: copy mmx values from/to memory with GPRs on x86-32 instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/mmx-copy-gprs.ll | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'test/CodeGen') diff --git a/test/CodeGen/X86/mmx-copy-gprs.ll b/test/CodeGen/X86/mmx-copy-gprs.ll index 8cf36e05a8..da17a04a46 100644 --- a/test/CodeGen/X86/mmx-copy-gprs.ll +++ b/test/CodeGen/X86/mmx-copy-gprs.ll @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax} +; RUN: llvm-as < %s | llc -march=x86 | grep {movl.*4(%eax),} ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs, ; increases the places that need to use emms. @@ -6,9 +7,9 @@ ; rdar://5741668 target triple = "x86_64-apple-darwin8" -define i32 @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind { +define void @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind { entry: %tmp1 = load <1 x i64>* %y, align 8 ; <<1 x i64>> [#uses=1] store <1 x i64> %tmp1, <1 x i64>* %x, align 8 - ret i32 undef + ret void } -- cgit v1.2.3-70-g09d2