From b00f236b03ea57520f94823780896ebdbc5d8bdc Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 16 Oct 2009 20:59:35 +0000 Subject: Move zext and sext casts fed by loads into the same block as the load, to help SelectionDAG fold them into the loads, unless conditions are unfavorable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84271 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/codegen-prepare-extload.ll | 20 ++++++++++++++++++++ test/CodeGen/X86/stack-color-with-reg.ll | 4 ++-- 2 files changed, 22 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/X86/codegen-prepare-extload.ll (limited to 'test/CodeGen') diff --git a/test/CodeGen/X86/codegen-prepare-extload.ll b/test/CodeGen/X86/codegen-prepare-extload.ll new file mode 100644 index 0000000000..9f57d53178 --- /dev/null +++ b/test/CodeGen/X86/codegen-prepare-extload.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s +; rdar://7304838 + +; CodeGenPrepare should move the zext into the block with the load +; so that SelectionDAG can select it with the load. + +; CHECK: movzbl (%rdi), %eax + +define void @foo(i8* %p, i32* %q) { +entry: + %t = load i8* %p + %a = icmp slt i8 %t, 20 + br i1 %a, label %true, label %false +true: + %s = zext i8 %t to i32 + store i32 %s, i32* %q + ret void +false: + ret void +} diff --git a/test/CodeGen/X86/stack-color-with-reg.ll b/test/CodeGen/X86/stack-color-with-reg.ll index 672f77eef0..0f32a50fc5 100644 --- a/test/CodeGen/X86/stack-color-with-reg.ll +++ b/test/CodeGen/X86/stack-color-with-reg.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t -; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 179 +; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 6 +; RUN: grep asm-printer %t | grep 177 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 -- cgit v1.2.3-70-g09d2