From db3c169f3a3102d40352ba63fd14a75c819c7adc Mon Sep 17 00:00:00 2001 From: Eli Friedman Date: Tue, 16 Jun 2009 06:58:29 +0000 Subject: Add some generic expansion logic for SMULO and UMULO. Fixes UMULO support for x86, and UMULO/SMULO for many architectures, including PPC (PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's not bad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73477 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/mul-with-overflow.ll | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 test/CodeGen/PowerPC/mul-with-overflow.ll (limited to 'test/CodeGen/PowerPC/mul-with-overflow.ll') diff --git a/test/CodeGen/PowerPC/mul-with-overflow.ll b/test/CodeGen/PowerPC/mul-with-overflow.ll new file mode 100644 index 0000000000..0276846d7c --- /dev/null +++ b/test/CodeGen/PowerPC/mul-with-overflow.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=ppc32 + +declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) +define i1 @a(i32 %x) zeroext nounwind { + %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3) + %obil = extractvalue {i32, i1} %res, 1 + ret i1 %obil +} + +declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b) +define i1 @b(i32 %x) zeroext nounwind { + %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %x, i32 3) + %obil = extractvalue {i32, i1} %res, 1 + ret i1 %obil +} -- cgit v1.2.3-18-g5258