From 42d60274eaa70f8cdbed76d04d25d7a8fc1237cb Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 26 Sep 2007 21:36:17 +0000 Subject: - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo. - Added ability to emit cross class register copies to the BBRU scheduler. - More aggressive backtracking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/MRegisterInfo.cpp | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'lib/Target/MRegisterInfo.cpp') diff --git a/lib/Target/MRegisterInfo.cpp b/lib/Target/MRegisterInfo.cpp index 3af611da48..c5a1251ac1 100644 --- a/lib/Target/MRegisterInfo.cpp +++ b/lib/Target/MRegisterInfo.cpp @@ -34,6 +34,21 @@ MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR, MRegisterInfo::~MRegisterInfo() {} +/// getPhysicalRegisterRegClass - Returns the Register Class of a physical +/// register. +const TargetRegisterClass * +MRegisterInfo::getPhysicalRegisterRegClass(MVT::ValueType VT, + unsigned reg) const { + assert(isPhysicalRegister(reg) && "reg must be a physical register"); + // Pick the register class of the right type that contains this physreg. + for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) + if ((*I)->hasType(VT) && (*I)->contains(reg)) + return *I; + assert(false && "Couldn't find the register class"); + return 0; +} + + /// getAllocatableSetForRC - Toggle the bits that represent allocatable /// registers for the specific register class. static void getAllocatableSetForRC(MachineFunction &MF, -- cgit v1.2.3-70-g09d2