From c1faced5ff356cae33da3abcc037ce840582f5eb Mon Sep 17 00:00:00 2001 From: Andrew Lenharth Date: Tue, 1 Feb 2005 01:37:24 +0000 Subject: pecimise loads, put indirect call addr in right register. still doesn't fix methcall git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19963 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Alpha/AlphaISelPattern.cpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp') diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 731f30337a..ecd635f43a 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -307,6 +307,12 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result) Node->dump(); assert(0 && "Node not handled!\n"); + case ISD::FP_ROUND: + assert (DestType == MVT::f32 && N.getOperand(0).getValueType() == MVT::f64 && "only f64 to f32 conversion supported here"); + Tmp1 = SelectExpr(N.getOperand(0)); + BuildMI(BB, Alpha::CVTTS, 1, Result).addReg(Tmp1); + return Result; + case ISD::FP_EXTEND: assert (DestType == MVT::f64 && N.getOperand(0).getValueType() == MVT::f32 && "only f32 to f64 conversion supported here"); Tmp1 = SelectExpr(N.getOperand(0)); @@ -660,7 +666,8 @@ unsigned ISel::SelectExpr(SDOperand N) { { //no need to restore GP as we are doing an indirect call Tmp1 = SelectExpr(N.getOperand(1)); - BuildMI(BB, Alpha::JSR, 2, Alpha::R26).addReg(Tmp1).addImm(1); + BuildMI(BB, Alpha::BIS, 2, Alpha::R27).addReg(Tmp1).addReg(Tmp1); + BuildMI(BB, Alpha::JSR, 2, Alpha::R26).addReg(Alpha::R27).addImm(0); } //push the result into a virtual register -- cgit v1.2.3-70-g09d2