From c623096fe227a7705ccac5a5db514b64ccdfe6b2 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 17 Oct 2007 14:48:28 +0000 Subject: Add support for ISD::SELECT in SplitVectorOp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43072 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'lib/CodeGen') diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index dfb7f306f5..da2c1dccb5 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -6225,6 +6225,26 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo, } break; } + case ISD::SELECT: { + SDOperand Cond = Node->getOperand(0); + + SDOperand LL, LH, RL, RH; + SplitVectorOp(Node->getOperand(1), LL, LH); + SplitVectorOp(Node->getOperand(2), RL, RH); + + if (MVT::isVector(Cond.getValueType())) { + // Handle a vector merge. + SDOperand CL, CH; + SplitVectorOp(Cond, CL, CH); + Lo = DAG.getNode(Node->getOpcode(), NewVT, CL, LL, RL); + Hi = DAG.getNode(Node->getOpcode(), NewVT, CH, LH, RH); + } else { + // Handle a simple select with vector operands. + Lo = DAG.getNode(Node->getOpcode(), NewVT, Cond, LL, RL); + Hi = DAG.getNode(Node->getOpcode(), NewVT, Cond, LH, RH); + } + break; + } case ISD::ADD: case ISD::SUB: case ISD::MUL: -- cgit v1.2.3-70-g09d2