From 298ebf2bd80ca415e58bbcbd9866ee58f167b620 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 16 Feb 2006 08:27:56 +0000 Subject: If the false case is the current basic block, then this is a self loop. We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra instruction in the loop. Instead, invert the condition and emit "Loop: ... br!cond Loop; br Out. Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'lib/CodeGen') diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 766f846968..78f5623aed 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -562,6 +562,15 @@ void SelectionDAGLowering::visitBr(BranchInst &I) { } else { std::vector Ops; Ops.push_back(getRoot()); + // If the false case is the current basic block, then this is a self + // loop. We do not want to emit "Loop: ... brcond Out; br Loop", as it + // adds an extra instruction in the loop. Instead, invert the + // condition and emit "Loop: ... br!cond Loop; br Out. + if (CurMBB == Succ1MBB) { + std::swap(Succ0MBB, Succ1MBB); + SDOperand True = DAG.getConstant(1, Cond.getValueType()); + Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True); + } Ops.push_back(Cond); Ops.push_back(DAG.getBasicBlock(Succ0MBB)); Ops.push_back(DAG.getBasicBlock(Succ1MBB)); -- cgit v1.2.3-70-g09d2