From 0bcccac50481921ab86dfdbaadec79f1db35c662 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 11 May 2010 00:04:31 +0000 Subject: Ensure REG_SEQUENCE source operands are unique. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103449 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/TwoAddressInstructionPass.cpp | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'lib/CodeGen/TwoAddressInstructionPass.cpp') diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 4ccb661138..5b892a80e3 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1164,6 +1164,8 @@ bool TwoAddressInstructionPass::EliminateRegSequences() { DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << *MI); llvm_unreachable(0); } + + SmallSet Seen; for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) { unsigned SrcReg = MI->getOperand(i).getReg(); if (MI->getOperand(i).getSubReg() || @@ -1171,6 +1173,23 @@ bool TwoAddressInstructionPass::EliminateRegSequences() { DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << *MI); llvm_unreachable(0); } + + if (!Seen.insert(SrcReg)) { + // REG_SEQUENCE cannot have duplicated operands. Add a copy. + const TargetRegisterClass *RC = MRI->getRegClass(SrcReg); + unsigned NewReg = MRI->createVirtualRegister(RC); + bool Emitted = + TII->copyRegToReg(*MI->getParent(), MI, NewReg, SrcReg, RC, RC, + MI->getDebugLoc()); + (void)Emitted; + assert(Emitted && "Unable to issue a copy instruction!\n"); + MI->getOperand(i).setReg(NewReg); + MI->getOperand(i).setIsKill(); + } + } + + for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) { + unsigned SrcReg = MI->getOperand(i).getReg(); unsigned SrcIdx = MI->getOperand(i+1).getImm(); UpdateRegSequenceSrcs(SrcReg, DstReg, SrcIdx, MRI); } -- cgit v1.2.3-18-g5258