From 7eafc3e7be067709c6fcdae7b7fc4994c7ec2377 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 3 Dec 2012 21:17:00 +0000 Subject: Add a new hook for providing register allocator hints more flexibly. The TargetRegisterInfo::getRegAllocationHints() function is going to replace the existing mechanisms for providing target-dependent hints to the register allocator: ResolveRegAllocHint() and getRawAllocationOrder(). The new hook is more flexible because it allows the target to provide multiple preferred candidate registers for each virtual register, and it is easier to use because targets are not required to return a reference to a constant array like getRawAllocationOrder(). An optional VirtRegMap argument can be used to provide target-dependent hints that depend on the provisional assignments of other virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169154 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/TargetRegisterInfo.cpp | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'lib/CodeGen/TargetRegisterInfo.cpp') diff --git a/lib/CodeGen/TargetRegisterInfo.cpp b/lib/CodeGen/TargetRegisterInfo.cpp index 49dc3f9f17..9b776d1412 100644 --- a/lib/CodeGen/TargetRegisterInfo.cpp +++ b/lib/CodeGen/TargetRegisterInfo.cpp @@ -13,6 +13,9 @@ #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/ADT/BitVector.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/VirtRegMap.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetMachine.h" @@ -246,3 +249,38 @@ getCommonSuperRegClass(const TargetRegisterClass *RCA, unsigned SubA, } return BestRC; } + +// Compute target-independent register allocator hints to help eliminate copies. +void +TargetRegisterInfo::getRegAllocationHints(unsigned VirtReg, + ArrayRef Order, + SmallVectorImpl &Hints, + const MachineFunction &MF, + const VirtRegMap *VRM) const { + const MachineRegisterInfo &MRI = MF.getRegInfo(); + std::pair Hint = MRI.getRegAllocationHint(VirtReg); + + // Hints with HintType != 0 were set by target-dependent code. + // Such targets must provide their own implementation of + // TRI::getRegAllocationHints to interpret those hint types. + assert(Hint.first == 0 && "Target must implement TRI::getRegAllocationHints"); + + // Target-independent hints are either a physical or a virtual register. + unsigned Phys = Hint.second; + if (VRM && isVirtualRegister(Phys)) + Phys = VRM->getPhys(Phys); + + // Check that Phys is a valid hint in VirtReg's register class. + if (!isPhysicalRegister(Phys)) + return; + if (MRI.isReserved(Phys)) + return; + // Check that Phys is in the allocation order. We shouldn't heed hints + // from VirtReg's register class if they aren't in the allocation order. The + // target probably has a reason for removing the register. + if (std::find(Order.begin(), Order.end(), Phys) == Order.end()) + return; + + // All clear, tell the register allocator to prefer this register. + Hints.push_back(Phys); +} -- cgit v1.2.3-70-g09d2