From 9e64bbb322417c09f27afdf08e3946287c9df5aa Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Tue, 10 Feb 2009 23:27:53 +0000 Subject: Factor out more code for computing register live-range informationfor scheduling, and generalize is so that preserves state across scheduling regions. This fixes incorrect live-range information around terminators and labels, which are effective region boundaries. In place of looking for terminators to anchor inter-block dependencies, introduce special entry and exit scheduling units for this purpose. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/ScheduleDAG.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'lib/CodeGen/ScheduleDAG.cpp') diff --git a/lib/CodeGen/ScheduleDAG.cpp b/lib/CodeGen/ScheduleDAG.cpp index 718f591902..f9b9408354 100644 --- a/lib/CodeGen/ScheduleDAG.cpp +++ b/lib/CodeGen/ScheduleDAG.cpp @@ -28,7 +28,8 @@ ScheduleDAG::ScheduleDAG(MachineFunction &mf) TRI(TM.getRegisterInfo()), TLI(TM.getTargetLowering()), MF(mf), MRI(mf.getRegInfo()), - ConstPool(MF.getConstantPool()) { + ConstPool(MF.getConstantPool()), + EntrySU(), ExitSU() { } ScheduleDAG::~ScheduleDAG() {} @@ -58,6 +59,8 @@ void ScheduleDAG::Run(SelectionDAG *dag, MachineBasicBlock *bb, BB = bb; Begin = begin; End = end; + EntrySU = SUnit(); + ExitSU = SUnit(); Schedule(); -- cgit v1.2.3-70-g09d2