From 366e021fb2cb0efb8e727ef5e40bd55cef974c7a Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 30 Sep 2009 01:47:59 +0000 Subject: replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister() per customary usage git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/RegisterScavenging.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'lib/CodeGen/RegisterScavenging.cpp') diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index b99f88f94d..9fc3da3b17 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -242,7 +242,7 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator MI, for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); if (!MO.isReg() || MO.isUndef() || !MO.getReg() || - TRI->isVirtualRegister(MO.getReg())) + TargetRegisterInfo::isVirtualRegister(MO.getReg())) continue; Candidates.reset(MO.getReg()); for (const unsigned *R = TRI->getAliasSet(MO.getReg()); *R; R++) @@ -280,7 +280,8 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, // Exclude all the registers being used by the instruction. for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { MachineOperand &MO = I->getOperand(i); - if (MO.isReg() && MO.getReg() != 0 && !TRI->isVirtualRegister(MO.getReg())) + if (MO.isReg() && MO.getReg() != 0 && + !TargetRegisterInfo::isVirtualRegister(MO.getReg())) Candidates.reset(MO.getReg()); } -- cgit v1.2.3-70-g09d2