From 96f678f2d78ae9a2a8c99ca612bf59c056b36797 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Fri, 13 Jan 2012 06:30:30 +0000 Subject: Added the MachineSchedulerPass skeleton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148105 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/RegAllocBasic.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'lib/CodeGen/RegAllocBasic.cpp') diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp index 53dad76b3c..cb92513d8e 100644 --- a/lib/CodeGen/RegAllocBasic.cpp +++ b/lib/CodeGen/RegAllocBasic.cpp @@ -129,6 +129,7 @@ RABasic::RABasic(): MachineFunctionPass(ID) { initializeSlotIndexesPass(*PassRegistry::getPassRegistry()); initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry()); initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry()); + initializeMachineSchedulerPassPass(*PassRegistry::getPassRegistry()); initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry()); initializeLiveStacksPass(*PassRegistry::getPassRegistry()); initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry()); @@ -148,6 +149,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const { if (StrongPHIElim) AU.addRequiredID(StrongPHIEliminationID); AU.addRequiredTransitiveID(RegisterCoalescerPassID); + if (EnableMachineSched) + AU.addRequiredID(MachineSchedulerPassID); AU.addRequired(); AU.addRequired(); AU.addPreserved(); -- cgit v1.2.3-18-g5258