From 9d709a8edb696e89b33cd3c2886c8db735b02318 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 2 Jun 2010 01:08:27 +0000 Subject: Enable machine cse of instructions which define physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineCSE.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'lib/CodeGen/MachineCSE.cpp') diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 6f4f7a8834..d8e2ec64da 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -31,9 +31,6 @@ using namespace llvm; STATISTIC(NumCoalesces, "Number of copies coalesced"); STATISTIC(NumCSEs, "Number of common subexpression eliminated"); -static cl::opt CSEPhysDef("machine-cse-phys-defs", - cl::init(false), cl::Hidden); - namespace { class MachineCSE : public MachineFunctionPass { const TargetInstrInfo *TII; @@ -376,7 +373,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) { // ... Unless the CS is local and it also defines the physical register // which is not clobbered in between. - if (PhysDef && CSEPhysDef) { + if (PhysDef) { unsigned CSVN = VNT.lookup(MI); MachineInstr *CSMI = Exps[CSVN]; if (PhysRegDefReaches(CSMI, MI, PhysDef)) -- cgit v1.2.3-70-g09d2