From b853e6c3702149cdbbd6fa404334e3ba0055641a Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Thu, 9 Dec 2010 18:15:21 +0000 Subject: Added register reassignment prototype to RAGreedy. It's a simple heuristic to reshuffle register assignments when we can't find an available reg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121388 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LiveIntervalUnion.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'lib/CodeGen/LiveIntervalUnion.cpp') diff --git a/lib/CodeGen/LiveIntervalUnion.cpp b/lib/CodeGen/LiveIntervalUnion.cpp index 1fca034fdc..d5c7bf08eb 100644 --- a/lib/CodeGen/LiveIntervalUnion.cpp +++ b/lib/CodeGen/LiveIntervalUnion.cpp @@ -247,10 +247,13 @@ collectInterferingVRegs(unsigned MaxInterferingRegs) { if (!IR.LiveUnionI.value()->isSpillable()) SeenUnspillableVReg = true; - InterferingVRegs.push_back(IR.LiveUnionI.value()); if (InterferingVRegs.size() == MaxInterferingRegs) + // Leave SeenAllInterferences set to false to indicate that at least one + // interference exists beyond those we collected. return MaxInterferingRegs; + InterferingVRegs.push_back(IR.LiveUnionI.value()); + // Cache the most recent interfering vreg to bypass isSeenInterference. RecentInterferingVReg = IR.LiveUnionI.value(); ++IR.LiveUnionI; -- cgit v1.2.3-70-g09d2