From bab2474b64e81be0ed4fc35d16cdfac65f283361 Mon Sep 17 00:00:00 2001 From: Christopher Lamb Date: Thu, 26 Jul 2007 08:18:32 +0000 Subject: Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LLVMTargetMachine.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'lib/CodeGen/LLVMTargetMachine.cpp') diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index 218e79ac72..4620abb721 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -96,6 +96,8 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM, if (addPreEmitPass(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); + + PM.add(createLowerSubregsPass()); switch (FileType) { default: @@ -197,6 +199,8 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, if (addPreEmitPass(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); + + PM.add(createLowerSubregsPass()); addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE); -- cgit v1.2.3-70-g09d2