From 3feb0170a8d65984ce5c01a85e7dfd4005f8bb35 Mon Sep 17 00:00:00 2001 From: Christopher Lamb Date: Mon, 10 Mar 2008 06:12:08 +0000 Subject: Allow insert_subreg into implicit, target-specific values. Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/SelectionDAGNodes.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 3828134093..77001cf8e2 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -322,9 +322,12 @@ namespace ISD { // This node takes a superreg and a constant sub-register index as operands. EXTRACT_SUBREG, - // INSERT_SUBREG - This node is used to insert a sub-register value. + // INSERT_SUBREG - This node is used to insert a sub-register value into + // either explicitly into a superreg, or implicitly into a superreg value. // This node takes a superreg, a subreg value, and a constant sub-register - // index as operands. + // index as operands. The superreg may be either a superregister operand or a + // target constant indicating that the insert is being done into a target + // specific implicit value. INSERT_SUBREG, // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing -- cgit v1.2.3-70-g09d2