From 9db3ea46cb7bd6bdf108d314daffd0dfd50a73fe Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 10 Aug 2010 18:37:40 +0000 Subject: Implement register class inflation. When splitting a live range, the new registers have fewer uses and the permissible register class may be less constrained. Recompute the register class constraint from the uses of new registers created for a split. This may let them be allocated from a larger set, possibly avoiding a spill. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110703 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetInstrDesc.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/llvm/Target') diff --git a/include/llvm/Target/TargetInstrDesc.h b/include/llvm/Target/TargetInstrDesc.h index 6a08e8f24c..a127aed8f6 100644 --- a/include/llvm/Target/TargetInstrDesc.h +++ b/include/llvm/Target/TargetInstrDesc.h @@ -152,6 +152,12 @@ public: return -1; } + /// getRegClass - Returns the register class constraint for OpNum, or NULL. + const TargetRegisterClass *getRegClass(unsigned OpNum, + const TargetRegisterInfo *TRI) const { + return OpNum < NumOperands ? OpInfo[OpNum].getRegClass(TRI) : 0; + } + /// getOpcode - Return the opcode number for this descriptor. unsigned getOpcode() const { return Opcode; -- cgit v1.2.3-70-g09d2