From 22de91aec556d44ee580c2e42f45c7675da98349 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 1 Jun 2012 23:28:34 +0000 Subject: Remove the old register list functions from MCRegisterInfo. These functions exposed the layout of the underlying data tables as null-terminated uint16_t arrays. Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator classes instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157855 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/CodeGenerator.html | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'docs/CodeGenerator.html') diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index 2829a94d4b..672dc294a7 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -1626,9 +1626,9 @@ def : Pat<(i32 imm:$imm), the registers EAX, AX and AL share the first eight bits. These physical registers are marked as aliased in LLVM. Given a particular architecture, you can check which registers are aliased by - inspecting its RegisterInfo.td file. Moreover, the method - MCRegisterInfo::getAliasSet(p_reg) returns an array containing - all the physical registers aliased to the register p_reg.

+ inspecting its RegisterInfo.td file. Moreover, the class + MCRegAliasIterator enumerates all the physical registers aliased to + a register.

Physical registers, in LLVM, are grouped in Register Classes. Elements in the same register class are functionally equivalent, and can be -- cgit v1.2.3-70-g09d2