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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169116 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169110 91177308-0d34-0410-b5e6-96231b3b80d8
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; CHECK: [[VAR:[a-z]]]
The problem was that to find the end of the regex var definition, it was
simplistically looking for the next ]] and finding the incorrect one. A
better approach is to count nesting of brackets (taking escaping into
account). This way the brackets that are part of the regex can be discovered
and skipped properly, and the ]] ending is detected in the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169109 91177308-0d34-0410-b5e6-96231b3b80d8
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See http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121126/157198.html
and related discussions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169101 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169064 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169055 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169038 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169002 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of 1 or true (?!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169001 91177308-0d34-0410-b5e6-96231b3b80d8
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Use this type for arrays of physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168850 91177308-0d34-0410-b5e6-96231b3b80d8
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This class has been merged into its super-class TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168760 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168750 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168729 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
lib/CodeGen/AsmPrinter/DwarfDebug.h
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
lib/Target/Mips/MipsISelDAGToDAG.cpp
lib/Target/Mips/MipsInstrFPU.td
lib/Target/Mips/MipsSubtarget.cpp
lib/Target/Mips/MipsSubtarget.h
lib/Target/X86/X86MCInstLower.cpp
tools/Makefile
tools/llc/llc.cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168490 91177308-0d34-0410-b5e6-96231b3b80d8
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When code deletes the context, the AttributeImpls that the AttrListPtr points to
are now invalid. Therefore, instead of keeping a separate managed static for the
AttrListPtrs that's reference counted, move it into the LLVMContext and delete
it when deleting the AttributeImpls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168354 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168256 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168255 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168254 91177308-0d34-0410-b5e6-96231b3b80d8
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This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
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(svn r167699, also the 3.2 branch point)
Conflicts:
lib/Target/X86/X86Subtarget.cpp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168048 91177308-0d34-0410-b5e6-96231b3b80d8
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Approved by Chris Lattner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
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FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167978 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167971 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrFormats.td
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reference types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167674 91177308-0d34-0410-b5e6-96231b3b80d8
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Avoid iterating over list of operands beyond the number of operands in it.
PS: this fixes issue with revision #167634.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167635 91177308-0d34-0410-b5e6-96231b3b80d8
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Avoid iterating over list of operands beyond the number of operands in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167634 91177308-0d34-0410-b5e6-96231b3b80d8
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- Add RTM code generation support throught 3 X86 intrinsics:
xbegin()/xend() to start/end a transaction region, and xabort() to abort a
tranaction region
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/ARM/ARMFrameLowering.cpp
lib/Target/Mips/MipsRegisterInfo.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Transforms/IPO/ExtractGV.cpp
tools/Makefile
tools/gold/gold-plugin.cpp
The only interesting conflict was X86ISelLowering.ccp, which
meant I had to essentially revert r167104. The problem is that we are
using ESP as the stack pointer in X86ISelLowering and RSP as the
stack pointer in X86FrameLowering, and that revision made them
both consistently use X86RegisterInfo to determine which to use.
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"../llvm-git/utils/TableGen/CodeGenSchedule.cpp", line 1594.12: 1540-0218 (S) The call does not match any parameter list for "operator+".
"../llvm-git/include/llvm/ADT/STLExtras.h", line 130.1: 1540-1283 (I) "template <class _Iterator, class Func> llvm::operator+(mapped_iterator<_Iterator,Func>::difference_type, const mapped_iterator<_Iterator,Func> &)" is not a viable candidate.
Patch by Kai.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167311 91177308-0d34-0410-b5e6-96231b3b80d8
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Explicitly allow composition of null sub-register indices, and handle
that common case in an inlinable stub.
Use a compressed table implementation instead of the previous nested
switches which generated pretty bad code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167190 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166719 91177308-0d34-0410-b5e6-96231b3b80d8
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Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166712 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/X86/X86FrameLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
The Intel folks switched some of the FrameLowering code to use
X86RegisterInfo::getSlotSize isntead of pointer size, thus reducing
our localmods in that file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166694 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166686 91177308-0d34-0410-b5e6-96231b3b80d8
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Relationship maps are represented as InstrMapping records which are parsed by
TableGen and the information is used to construct mapping tables to represent
appropriate relations between instructions. These tables are emitted into
XXXGenInstrInfo.inc file along with the functions to query them.
Patch by Jyotsna Verma <jverma@codeaurora.org>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166685 91177308-0d34-0410-b5e6-96231b3b80d8
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SetTheory, but pass down the location explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166629 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/Mips/MipsISelLowering.h
lib/Target/X86/X86ISelLowering.h
lib/Target/X86/X86TargetMachine.h
tools/llc/llc.cpp
The only interesting conflict was ARMISelLowering, caused by
http://llvm.org/viewvc/llvm-project?view=rev&revision=166273
which actually removes a LOCALMOD for ARM byval lowering.
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rather than "$src = $dst").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166382 91177308-0d34-0410-b5e6-96231b3b80d8
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(vg_leak).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166306 91177308-0d34-0410-b5e6-96231b3b80d8
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- The XTARGET feature (inherited from old DG tests) was just confusing (and
barely ever used). The same effect can now be achieved with a combination of
the more useful REQUIRES and XFAIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166305 91177308-0d34-0410-b5e6-96231b3b80d8
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- These can be used with the XFAIL options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166303 91177308-0d34-0410-b5e6-96231b3b80d8
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odd things if this is missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166289 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166224 91177308-0d34-0410-b5e6-96231b3b80d8
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Conflicts:
lib/Target/X86/X86FrameLowering.cpp
lib/Target/X86/X86ISelLowering.cpp
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This gets rid of some magic numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165924 91177308-0d34-0410-b5e6-96231b3b80d8
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Convert the internal representation of the Attributes class into a pointer to an
opaque object that's uniqued by and stored in the LLVMContext object. The
Attributes class then becomes a thin wrapper around this opaque
object. Eventually, the internal representation will be expanded to include
attributes that represent code generation options, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165917 91177308-0d34-0410-b5e6-96231b3b80d8
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