aboutsummaryrefslogtreecommitdiff
path: root/utils/TableGen/EDEmitter.cpp
AgeCommit message (Expand)Author
2012-03-06ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach
2012-03-06ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach
2012-03-05ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach
2012-03-05ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach
2012-02-18Add X86 assembler and disassembler support for AMD SVM instructions. Original...Craig Topper
2012-02-11Make the EDis tables const.Benjamin Kramer
2011-12-22ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach
2011-12-21ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach
2011-12-07ARM: NEON SHLL instruction immediate operand range checking.Jim Grosbach
2011-12-02ARM NEON VEXT aliases for data type suffices.Jim Grosbach
2011-11-30ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach
2011-11-30llvm_unreachable() is not for user diagnostics....Jim Grosbach
2011-11-30ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach
2011-11-15Add vmov.f32 to materialize f32 immediate splats which cannot be handled byEvan Cheng
2011-10-21Assembly parsing for 2-register sequential variant of VLD2.Jim Grosbach
2011-10-21Assembly parsing for 4-register variant of VLD1.Jim Grosbach
2011-10-21Assembly parsing for 3-register variant of VLD1.Jim Grosbach
2011-10-21ARM VLD parsing and encoding.Jim Grosbach
2011-10-18ARM VTBL (one register) assembly parsing and encoding.Jim Grosbach
2011-10-18ARM assembly parsing and encoding for VMOV.i64.Jim Grosbach
2011-10-18ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.Jim Grosbach
2011-10-17ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.Jim Grosbach
2011-10-17ARM NEON "vmov.i8" immediate assembly parsing and encoding.Jim Grosbach
2011-10-12ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach
2011-10-10Emit full ED initializers even for pseudo-instructions.Jakob Stoklund Olesen
2011-10-10Insert dummy ED table entries for pseudo-instructions.Jakob Stoklund Olesen
2011-10-07ARM NEON assembly parsing and encoding for VDUP(scalar).Jim Grosbach
2011-10-06Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w...Craig Topper
2011-10-01Move TableGen's parser and entry point into a libraryPeter Collingbourne
2011-09-26ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.Owen Anderson
2011-09-19Thumb2 assembly parsing and encoding for TBB/TBH.Jim Grosbach
2011-09-09Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.Jim Grosbach
2011-09-07Thumb2 assembly parsing and encoding for LDRBT.Jim Grosbach
2011-09-07Thumb2 parsing and encoding for LDR(immediate).Jim Grosbach
2011-08-26Improve encoding support for BLX with immediat eoperands, and fix a BLX decod...Owen Anderson
2011-08-24Thumb parsing and encoding support for ADD SP instructions.Jim Grosbach
2011-08-24Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach
2011-08-09Create a new register class for the set of all GPRs except the PC. Use it to...Owen Anderson
2011-08-08Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang...Owen Anderson
2011-08-04LDCL_POST and STCL_POST need one's-complement offsets, rather than two's comp...Owen Anderson
2011-08-03ARM refactoring assembly parsing of memory address operands.Jim Grosbach
2011-08-02ARM: rename addrmode7 to addr_offset_none.Jim Grosbach
2011-07-27Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.Kevin Enderby
2011-07-26Split am2offset into register addend and immediate addend forms, necessary fo...Owen Anderson
2011-07-26ARM parsing and encoding for SVC instruction.Jim Grosbach
2011-07-25ARM assembly parsing and encoding for SSAT16 instruction.Jim Grosbach
2011-07-22ARM SSAT instruction 5-bit immediate handling.Jim Grosbach
2011-07-21Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n...Owen Anderson
2011-07-21Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi...Owen Anderson
2011-07-20ARM PKH shift ammount operand printing tweaks.Jim Grosbach
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-04 19:11:31 +0000