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path: root/utils/TableGen/CodeGenInstruction.h
AgeCommit message (Expand)Author
2008-05-28Add a flag to indicate that an instruction is as cheap (or cheaper) than a moveBill Wendling
2008-03-15Remove isImplicitDef TargetInstrDesc flag.Evan Cheng
2008-01-10Start inferring side effect information more aggressively, and fix many bugs ...Chris Lattner
2008-01-08add a mayLoad property for machine instructions, a correlary to mayStore.Chris Lattner
2008-01-07rename hasVariableOperands() -> isVariadic(). Add some comments.Chris Lattner
2008-01-07the name field of instructions is never set to a non-empty string, Chris Lattner
2008-01-06rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner
2008-01-06rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner
2008-01-06Split the impl of CodeGenInstruction out to its own .cpp file, add a getName(...Chris Lattner
2007-12-29remove attributions from utils.Chris Lattner
2007-12-14Add flags to indicate that there are "never" side effects or that there "may be"Bill Wendling
2007-12-13Oops. Forgot these.Evan Cheng
2007-11-12Add a flag for indirect branch instructions.Owen Anderson
2007-07-20No need for noResults anymore.Evan Cheng
2007-07-19Change instruction description to split OperandList into OutOperandList andEvan Cheng
2007-07-10Try committing again. Add OptionalDefOperand. Remove clobbersPred.Evan Cheng
2007-06-26Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman
2007-06-19Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman
2007-06-19Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng
2007-06-06Add clobbersPred - instruction that clobbers condition code / register which ...Evan Cheng
2007-05-16Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable wit...Evan Cheng
2007-03-19Recognize target instruction flag 'isReMaterializable'.Evan Cheng
2006-11-15Remove the isTwoAddress property from the CodeGenInstruction class. It shouldChris Lattner
2006-11-15ADd support for adding constraints to suboperandsChris Lattner
2006-11-06simplify the way operand flags and constraints are handled, making it easierChris Lattner
2006-11-06recognize ppc's blr instruction as predicatedChris Lattner
2006-11-05Unbreak VC++ build.Jeff Cohen
2006-11-01Add operand constraints to TargetInstrInfo.Evan Cheng
2006-01-09* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag andEvan Cheng
2005-12-26Added field noResults to Instruction.Evan Cheng
2005-12-23* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAGEvan Cheng
2005-12-04* Commit the fix (by Chris) for a tblgen type inferencing bug.Evan Cheng
2005-12-01Nuke CodeGenInstruction's ValueType member, it is no longer used.Nate Begeman
2005-11-30fit into 80 columnsNate Begeman
2005-11-19Teach tblgen about instruction operands that have multiple MachineInstrChris Lattner
2005-08-26spell this variable rightChris Lattner
2005-08-26Expose a new flag to TargetInstrInfoChris Lattner
2005-08-19For now, just emit empty operand info structures.Chris Lattner
2005-08-18Figure out how many operands each instruction has, keep track of whetherChris Lattner
2005-04-22Remove trailing whitespaceMisha Brukman
2005-01-02Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.Chris Lattner
2004-09-28Add support for the isLoad and isStore flags, needed by the instruction sched...Nate Begeman
2004-09-28Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAGChris Lattner
2004-08-14Make the AsmWriter a first-class tblgen object. Allow targets to specifyChris Lattner
2004-08-11Start parsing more information from the Operand informationChris Lattner
2004-08-01Parse the operand list of the instruction. We currently support register and...Chris Lattner
2004-08-01Add, and start using, the CodeGenInstruction class. This class representsChris Lattner