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2013-03-15PNaCl: Add ExpandConstantExpr pass for converting ConstantExprs to InstructionsMark Seaborn
Once this pass is enabled, it will simplify the language to reduce the set of constructs that a PNaCl translator needs to handle as part of a stable wire format for PNaCl. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3337 TEST=test/Transforms/NaCl/expand-constantexpr.ll Review URL: https://codereview.chromium.org/12792011
2013-03-15ARM cost model: Fix costs for some vector selectsArnold Schwaighofer
I was too pessimistic in r177105. Vector selects that fit into a legal register type lower just fine. I was mislead by the code fragment that I was using. The stores/loads that I saw in those cases came from lowering the conditional off an address. Changing the code fragment to: %T0_3 = type <8 x i18> %T1_3 = type <8 x i1> define void @func_blend3(%T0_3* %loadaddr, %T0_3* %loadaddr2, %T1_3* %blend, %T0_3* %storeaddr) { %v0 = load %T0_3* %loadaddr %v1 = load %T0_3* %loadaddr2 ==> FROM: ;%c = load %T1_3* %blend ==> TO: %c = icmp slt %T0_3 %v0, %v1 ==> USE: %r = select %T1_3 %c, %T0_3 %v0, %T0_3 %v1 store %T0_3 %r, %T0_3* %storeaddr ret void } revealed this mistake. radar://13403975 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177170 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Adding an A15 specific optimization pass for interactions between S/D/Q ↵Silviu Baranga
registers. The pass handles all the required transformations pre-regalloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177169 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15ARM: Fix an old refacto.Benjamin Kramer
Fixes PR15520. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177167 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Enable unaligned memory access on PPC for scalar typesHal Finkel
Unaligned access is supported on PPC for non-vector types, and is generally more efficient than manually expanding the loads and stores. A few of the existing test cases were using expanded unaligned loads and stores to test other features (like load/store with update), and for these test cases, unaligned access remains disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177160 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15ARM cost model: Fix cost of fptrunc and fpext instructionsArnold Schwaighofer
A vector fptrunc and fpext simply gets split into scalar instructions. radar://13192358 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177159 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Protect PPC Altivec patterns with a predicateHal Finkel
In preparation for the addition of other SIMD ISA extensions (such as QPX) we need to make sure that all Altivec patterns are properly predicated on having Altivec support. No functionality change intended (one test case needed to be updated b/c it assumed that Altivec intrinsics would be supported without enabling Altivec support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177152 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Fixup for r176933: more careful setup of path to llvm-symbolizerAlexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Fix the FDE encoding to be relative on ELF.Rafael Espindola
This is a very late complement to r130637 which fixed this on x86_64. Fixes pr15448. Since it looks like that every elf architecture uses this encoding when using cfi, make it the default for elf. Just exclude mips64el. It has a lovely .ll -> .o test (ef_frame.ll) that tests that nothing changes in the binary content of the .eh_frame produced by llc. Oblige it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Allocate the RS spill slot for any PPC function with spills and a large ↵Hal Finkel
stack frame For spills into a large stack frame, the FI-elimination code uses the register scavenger to obtain a free GPR for use with an r+r-addressed load or store. When there are no available GPRs, the scavenger gets one by using its spill slot. Previously, we were not always allocating that spill slot and the RS would assert when the spill slot was needed. I don't currently have a small test that triggered the assert, but I've created a small regression test that verifies that the spill slot is now added when the stack frame is sufficiently large. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177140 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Add a triple to the test.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Unaligned loads should use the VMOVUPS opcode.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14LoopVectorizer: Insert some white space to make test case more readableArnold Schwaighofer
Also remove some unneeded function attributes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177114 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14[fast-isel] The X86FastISel::FastLowerArguments function doesn't properly handleChad Rosier
the win64 calling convention. rdar://13423768 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Not all PPC functions with a frame pointer need a RS spill slotHal Finkel
We used to add a spill slot for the register scavenger whenever the function has a frame pointer. This is unnecessarily conservative: We may need the spill slot for dynamic stack allocations, and functions with dynamic stack allocations always have a FP, but we might also have a FP for other reasons (such as the user explicitly disabling frame-pointer elimination), and we don't necessarily need a spill slot for those functions. The structsinregs test needed adjustment because it disables FP elimination. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14ARM cost model: Increase cost of some vector selects we do terrible onArnold Schwaighofer
By terrible I mean we store/load from the stack. This matters on PAQp8 in _Z5trainPsS_ii (which is inlined into Mixer::update) where we decide to vectorize a loop with a VF of 8 resulting in a 25% degradation on a cortex-a8. LV: Found an estimated cost of 2 for VF 8 For instruction: icmp slt i32 LV: Found an estimated cost of 2 for VF 8 For instruction: select i1, i32, i32 The bug that tracks the CodeGen part is PR14868. radar://13403975 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177105 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Hexagon: Removed asserts regarding alignment and offset.Jyotsna Verma
We are warning the user about the alignment, so we should not assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177103 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Add missing asserts flag to test - it uses debug flagsArnold Schwaighofer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177102 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14LoopVectorize: Invert case when we use a vector cmp value to query select costArnold Schwaighofer
We generate a select with a vectorized condition argument when the condition is NOT loop invariant. Not the other way around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Perform factorization as a last resort of unsafe fadd/fsub simplification.Shuxin Yang
Rules include: 1)1 x*y +/- x*z => x*(y +/- z) (the order of operands dosen't matter) 2) y/x +/- z/x => (y +/- z)/x The transformation is disabled if the new add/sub expr "y +/- z" is a denormal/naz/inifinity. rdar://12911472 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177088 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Test that we emit a DW_AT_location for self captured by a block.Adrian Prantl
This is the backend part of a CFE test with the same name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177087 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Cleanup of ABI CheckerDerek Schuff
Fix spacing of error output, use OwningPtr everywhere at top level, fix command line parsing R=jvoung@chromium.org BUG= Review URL: https://codereview.chromium.org/12690007
2013-03-14R600: Factorize code handling Const Read Port limitationVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177078 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14[ASan] emit instrumentation for initialization order checking by defaultAlexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14PR14972: SROA vs. GVN exposed a really bad bug in SROA.Chandler Carruth
The fundamental problem is that SROA didn't allow for overly wide loads where the bits past the end of the alloca were masked away and the load was sufficiently aligned to ensure there is no risk of page fault, or other trapping behavior. With such widened loads, SROA would delete the load entirely rather than clamping it to the size of the alloca in order to allow mem2reg to fire. This was exposed by a test case that neatly arranged for GVN to run first, widening certain loads, followed by an inline step, and then SROA which miscompiles the code. However, I see no reason why this hasn't been plaguing us in other contexts. It seems deeply broken. Diagnosing all of the above took all of 10 minutes of debugging. The really annoying aspect is that fixing this completely breaks the pass. ;] There was an implicit reliance on the fact that no loads or stores extended past the alloca once we decided to rewrite them in the final stage of SROA. This was used to encode information about whether the loads and stores had been split across multiple partitions of the original alloca. That required threading explicit tracking of whether a *use* of a partition is split across multiple partitions. Once that was done, another problem arose: we allowed splitting of integer loads and stores iff they were loads and stores to the entire alloca. This is a really arbitrary limitation, and splitting at least some integer loads and stores is crucial to maximize promotion opportunities. My first attempt was to start removing the restriction entirely, but currently that does Very Bad Things by causing *many* common alloca patterns to be fully decomposed into i8 operations and lots of or-ing together to produce larger integers on demand. The code bloat is terrifying. That is still the right end-goal, but substantial work must be done to either merge partitions or ensure that small i8 values are eagerly merged in some other pass. Sadly, figuring all this out took essentially all the time and effort here. So the end result is that we allow splitting only when the load or store at least covers the alloca. That ensures widened loads and stores don't hurt SROA, and that we don't rampantly decompose operations more than we have previously. All of this was already fairly well tested, and so I've just updated the tests to cover the wide load behavior. I can add a test that crafts the pass ordering magic which caused the original PR, but that seems really brittle and to provide little benefit. The fundamental problem is that widened loads should Just Work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ↵Craig Topper
set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Fix PR15309Michael Liao
- Fix the typo on type checking git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14test commit: remove blank line.Jiong Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177009 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Remove a change to the debug info in this test, that I made while testingNick Lewycky
something else and forgot to remove. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Try using %S to find the emitted .gcno file.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Refactor GCOV's six constructor arguments into a struct with a getter thatNick Lewycky
constructs default arguments. It can now take default arguments from cl::opt'ions. Add a new -default-gcov-version=... option, and actually test it! Sink the reverse-order of the version into GCOVProfiling, hiding it from our users. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Simplify file/directory name handling in DILexicalBlockDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176993 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Remove an extra operand to a DIFile metadata entryDavid Blaikie
(extra cleanup/fallout from r176983 - not sure why I didn't catch this locally) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Remove the unused 4th operand for DIFile debug info metadataDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13ARM cost model: Add test case to make sure we would notice a change in CodeGenArnold Schwaighofer
In r176898 I updated the cost model to reflect the fact that sext/zext/cast on v8i32 <-> v8i8 and v16i32 <-> v16i8 are expensive. This test case is so that we make sure to update the cost model once we fix CodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Add llvm-symbolizer as test dependency.Evgeniy Stepanov
It is required when building tests with ASan or MSan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Set symbolizer path in the test environment.Evgeniy Stepanov
This is needed to get symbolized stack traces when running LLVM tests under (A|M)San. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Refactor filename/directory in DICompileUnit into a DIFileDavid Blaikie
This is the next step towards making the metadata for DIScopes have a common prefix rather than having to delegate based on their tag type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12Remove unused "isMain" field from DICompileUnitDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12Update debug info test cases with empty SplitDebugFilename field.David Blaikie
This could be 'null' or the empty string, DIDescriptor::getStringField coalesces the two cases anyway so it's just a matter of legible/efficient representation. The change in behavior of the DICompileUnit::get* functions could be subsumed by the full verification check - but ideally that should just be an assertion if we could front-load the actual debug info metadata failure paths. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12ARM cost model: Increase the cost for vector casts that use the stackArnold Schwaighofer
Increase the cost of v8/v16-i8 to v8/v16-i32 casts and truncates as the backend currently lowers those using stack accesses. This was responsible for a significant degradation on MultiSource/Benchmarks/Trimaran/enc-pc1/enc-pc1 where we vectorize one loop to a vector factor of 16. After this patch we select a vector factor of 4 which will generate reasonable code. unsigned char cle[32]; void test(short c) { unsigned short compte; for (compte = 0; compte <= 31; compte++) { cle[compte] = cle[compte] ^ c; } } radar://13220512 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176898 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12Correct invalid debug info metadataDavid Blaikie
Code review feedback on r176838 by Patrik Hägglund. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176884 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12Revert the test moves from 176733. Use "REQUIRES: asserts" instead.Jan Wen Voung
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176873 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12Don't reserve R2 on Darwin/PPCHal Finkel
Now that only the register-scavenger version of the CR spilling code remains, we no longer need the Darwin R2 hack. Darwin can use R0 as a spare register in any case where the System V ABI uses it (R0 is special architecturally, and so is reserved under all common ABIs). A few test cases needed to be updated to reflect the register-allocation changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176868 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-12In r169695, the address space limit for tests was replaced with a dataPatrik Hagglund
segment limit. Now, as a complement, add a stack space limit. Otherwise, tests may grow undesirable large at inifinite recursion. (Seen at r176838, test/Assembler/2010-02-05-FunctionLocalMetadataBecomesNull.ll) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176835 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Upgrading debug info test cases to be (more) compatible with the current ↵David Blaikie
debug info format. These cases were found by further work to remove support for debug info versioning. Common cleanups (other than changing the version info in the tag field) included adding the last parameter to compile_units (recently added for fission support) and other cases of trailing fields in lexical blocks, compile units, and subprograms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176834 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Merge commit '279b9184c2ff4fea93b198a3519b8cb3a1d8d195'Eli Bendersky
Conflicts: include/llvm/CodeGen/LexicalScopes.h include/llvm/MC/MCAsmInfo.h lib/Linker/LinkArchives.cpp lib/Linker/LinkItems.cpp lib/MC/MCAsmInfo.cpp lib/MC/MCDwarf.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp lib/Target/Mips/MipsAsmPrinter.cpp lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/Mips/MipsTargetObjectFile.cpp lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86TargetMachine.cpp lib/Transforms/CMakeLists.txt lib/Transforms/LLVMBuild.txt lib/Transforms/Makefile test/MC/ARM/arm_instructions.s test/MC/X86/AlignedBundling/pad-align-to-bundle-end.s
2013-03-11Remove duplicate test contents.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Fix a crasher newly introduced in r176659/r176649, where fast-isel tries toNick Lewycky
lower an expect intrinsic that is a constant expression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176830 91177308-0d34-0410-b5e6-96231b3b80d8
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