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2013-02-27IR: Don't constant fold GEP bitcasts between different address spacesMeador Inge
PR15262 reported a bug where the following instruction: i8 getelementptr inbounds i8* bitcast ([4 x i8] addrspace(12)* @buf to i8*), i32 2 was getting folded into: addrspace(12)* getelementptr inbounds ([4 x i8] addrspace(12)* @buf, i32 0, i32 2) This caused instcombine to crash because the original instruction and the folded instruction have different types. The issue was fixed by disallowing bitcasts between different address spaces to be folded away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27SelectionDAG: If llvm.donothing has a landingpad, we should clearManman Ren
CurrentCallSite to avoid an assertion failure: assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!"); rdar://problem/13228754 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176154 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27Debug Info: for static member variables, add AT_MIPS_linkage_name to theManman Ren
definition DIE, to make old GDB happy. We have a regression for old GDB when Clang uses DW_TAG_member to declare static members inside a class, instead of DW_TAG_variable. This patch will fix this regression. rdar://problem/13291234 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176143 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Constant fold vector bitcasts of halves similarly to how floats and doubles ↵Michael Ilseman
are folded. Test case included. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Revert r176120 as it caused a failure at static-member.cppManman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176129 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Fix PR15332 (patch by Florian Zeitz).Bill Schmidt
There's no need to generate a stack frame for PPC32 SVR4 when there are no local variables assigned to the stack, i.e., when no red zone is needed. (PPC64 supports a red zone, but PPC32 does not.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176124 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Debug Info: for static member variables, move AT_MIPS_linkage_name fromManman Ren
TAG_member inside a class to the specification DIE. Having AT_MIPS_linkage_name on TAG_member caused old gdb (GNU 6.3.50) to error out. Also gcc 4.7 has AT_MIPS_linkage_name on the specification DIE. rdar://problem/13291234 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176120 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Add a test case for r176066.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176119 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26AsmParser: More generic support for integer type suffices.Jim Grosbach
For integer constants, allow 'L', 'UL' as well as 'ULL' and 'LL'. This provides better support for shared headers between .s and .c files that define bunches of constant values. rdar://9321056 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Remove a few unused arguments.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176109 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Proper XFAILs for ARMv7 / v5Renato Golin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176095 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Fix PR15359.Bill Schmidt
The PowerPC TLS relocation types were not previously added to the necessary list in MCELFStreamer::fixSymbolsInTLSFixups(). Now they are! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176094 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Unify clang/llvm attributes for asan/tsan/msan (LLVM part)Kostya Serebryany
These are two related changes (one in llvm, one in clang). LLVM: - rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode) - rename thread_safety => sanitize_thread - rename no_uninitialized_checks -> sanitize_memory CLANG: - add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis)) - add __attribute__((no_sanitize_thread)) - add __attribute__((no_sanitize_memory)) for S in address thread memory If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not set llvm attribute sanitize_S git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176075 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix PR10499Michael Liao
- Check whether SSE is available before lowering all 1s vector building with PCMPEQD, which is only available from SSE2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Remove extraneous attribute number.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25[fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 orChad Rosier
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25pre-RA-sched fix: only reevaluate physreg interferences when necessary.Andrew Trick
Fixes rdar:13279013: scheduler was blowing up on select instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176037 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25[ms-inline asm] Add support for the pushad/popad mnemonics.Chad Rosier
rdar://13254235 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix missing relocation for TLS addressing peephole optimization.Bill Schmidt
Report and fix due to Kai Nacke. Testcase update by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176029 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix the root cause of PR15348 by correctly handling alignment 0 onChandler Carruth
memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176022 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24CVP: If we have a PHI with an incoming select, try to skip the select.Benjamin Kramer
This is a common pattern with dyn_cast and similar constructs, when the PHI no longer depends on the select it can often be turned into a simpler construct or even get hoisted out of the loop. PR15340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24Fix invalid IR in test, missing incoming value for PHI node.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24Revert r169638 because it broke Mesa llvmpipe tests.Nadav Rotem
Fix PR15239. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Some more tests for the global structure vectorizerRenato Golin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23X86: Disable cmov-memory patterns on subtargets without cmov.Benjamin Kramer
Fixes PR15115. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175962 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Expand pseudos/macros for Selt. This is the last of the complexReed Kotler
macros.The rest is some small misc. stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23ARM: Convenience aliases for 'srs*' instructions.Jim Grosbach
Handle an implied 'sp' operand. rdar://11466783 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Use getSplitDebugFilename when constructing the skeleton cu andEric Christopher
update testcase accordingly to give the correct name to the cu. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22ABI Verifier: Check types in metadata nodesDerek Schuff
This should be the last source of type references R=jvoung@chromium.org,eliben@chromium.org BUG= https://code.google.com/p/nativeclient/issues/detail?id=2309 Review URL: https://codereview.chromium.org/12321032
2013-02-22[mips] Emit call16 operator instead of got_disp. The former allows lazy binding.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Fix test by matching movaps instead of AVX-only vmovapsPeter Collingbourne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22x86_64: designate most general purpose and SSE registers as callee save ↵Peter Collingbourne
under coldcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Remove unused CHECK lines copied from another testPete Cooper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22More tests to global struct vectorizerRenato Golin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175898 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Make ARMAsmPrinter generate the correct alignment specifier syntax in ↵Kristof Beyls
instructions. The Printer will now print instructions with the correct alignment specifier syntax, like vld1.8 {d16}, [r0:64] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Use references to attribute groups on the call/invoke instructions.Bill Wendling
Listing all of the attributes for the callee of a call/invoke instruction is way too much and makes the IR unreadable. Use references to attributes instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Expand mips16 SelT form pseudso/macros.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Fix isa<> check which could never be true.Pete Cooper
It was incorrectly checking a Function* being an IntrinsicInst* which isn't possible. It should always have been checking the CallInst* instead. Added test case for x86 which ensures we only get one constant load. It was 2 before this change. rdar://problem/13267920 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Previously, parsing capability of the .debug_frame section was addedEli Bendersky
to lib/DebugInfo, with dumping in llvm-dwarfdump. This patch adds initial ability to parse and dump CFA instructions contained in entries. To keep it manageable, the patch omits some more advanced capabilities (accounted in TODOs): * Parsing of instructions with BLOCK arguments (expression lists) * Dumping of actual instruction arguments (currently only names are dumped). This is quite tricky since the dumper has to effectively "interpret" the instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Allow GlobalValues to vectorize with AliasAnalysisRenato Golin
Storing the load/store instructions with the values and inspect them using Alias Analysis to make sure they don't alias, since the GEP pointer operand doesn't take the offset into account. Trying hard to not add any extra cost to loads and stores that don't overlap on global values, AA is *only* calculated if all of the previous attempts failed. Using biggest vector register size as the stride for the vectorization access, as we're being conservative and the cost model (which calculates the real vectorization factor) is only run after the legalization phase. We might re-think this relationship in the future, but for now, I'd rather be safe than sorry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175818 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Hexagon: Expand cttz, ctlz, and ctpop for now.Anshuman Dasgupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Make RAFast::UsedInInstr indexed by register units.Jakob Stoklund Olesen
This fixes some problems with too conservative checking where we were marking all aliases of a register as used, and then also checking all aliases when allocating a register. <rdar://problem/13249625> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Large code model support for PowerPC.Bill Schmidt
Large code model is identical to medium code model except that the addis/addi sequence for "local" accesses is never used. All accesses use the addis/ld sequence. The coding changes are straightforward; most of the patch is taken up with creating variants of the medium model tests for large model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21DAGCombiner: Make the post-legalize vector op optimization more aggressive.Benjamin Kramer
A legal BUILD_VECTOR goes in and gets constant folded into another legal BUILD_VECTOR so we don't lose any legality here. The problematic PPC optimization that made this check necessary was fixed recently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175759 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21R600: Fix for Unigine when MachineSched is enabledTom Stellard
Fixes for-loop.cl piglit test Patch By: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175742 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32Michel Danzer
NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175733 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Expand the sel pseudo/macro. This generates basic blocks where previouslyReed Kotler
there were inline br .+4 instructions. Soon everything can enjoy the full instruction scheduling experience. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Mips specific standalone assembler addressing mode %hi and %lo.Jack Carter
The constructs %hi() and %lo() represent the high and low 16 bits of the address. Because the 16 bit offset field of an LW instruction is interpreted as signed, if bit 15 of the low part is 1 then the low part will act as a negative and 1 needs to be added to the high part. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21PPCDAGToDAGISel::PostprocessISelDAG()Bill Schmidt
This patch implements the PPCDAGToDAGISel::PostprocessISelDAG virtual method to perform post-selection peephole optimizations on the DAG representation. One optimization is implemented here: folds to clean up complex addressing expressions for thread-local storage and medium code model. It will also be useful for large code model sequences when those are added later. I originally thought about doing this on the MI representation prior to register assignment, but it's difficult to do effective global dead code elimination at that point. DCE is trivial on the DAG representation. A typical example of a candidate code sequence in assembly: addis 3, 2, globalvar@toc@ha addi 3, 3, globalvar@toc@l lwz 5, 0(3) When the final instruction is a load or store with an immediate offset of zero, the offset from the add-immediate can replace the zero, provided the relocation information is carried along: addis 3, 2, globalvar@toc@ha lwz 5, globalvar@toc@l(3) Since the addi can in general have multiple uses, we need to only delete the instruction when the last use is removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175697 91177308-0d34-0410-b5e6-96231b3b80d8
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