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2013-05-04Fix buildbot failure on 64 bit linux due to std::max() having differentRichard Osborne
operand types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181128 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04[XCore] Remove unused operand type.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181127 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04[XCore] Make use of the target independent global address offset folding.Richard Osborne
This let us to remove some custom code that matched constant offsets from globals at instruction selection time as a special addressing mode. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181126 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04[XCore] Simplify code that checks for an aligned base plus a constant.Richard Osborne
The code now makes use of ComputeMaskedBits, SelectionDAG::isBaseWithConstantOffset and TargetLowering::isGAPlusOffset where appropriate reducing the amount of logic needed in XCoreISelLowering. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181125 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04[XCore] Move lowering of thread local storage to a separate pass.Richard Osborne
Thread local storage is not supported by the XMOS linker so we handle thread local variables by lowering the variable to an array of n elements (where n is the number of hardware threads per core, currently 8 for all XMOS devices) indexed by the the current thread ID. Previously this lowering was spread across the XCoreISelLowering and the XCoreAsmPrinter classes. Moving this to a separate pass should be much cleaner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181124 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04AArch64: assert code model is small for TLS accessesTim Northover
Supporting TLS in the large memory model is rather difficult at the moment, so make sure no-one gets into difficulties by mistake. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181121 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04AArch64: support literal pool access in large memory model.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181120 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04AArch64: support large code model for jump-tablesTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181119 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04AArch64: implement support for blockaddress in large code modelTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04AArch64: implement large code model access to global variables.Tim Northover
The MOVZ/MOVK instruction sequence may not be the most efficient (a literal-pool load could be better) but adding that would require reinstating the ConstantIslands pass. For now the sequence is correct, and that's enough. Beware, as of commit GNU ld does not appear to support the relocations needed for this. Its primary purpose (for now) will be to support JITed code, since in that case there is no guarantee of where your code will end up in memory relative to external symbols it references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181117 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04[XCore] Use static relocation model by default.Richard Osborne
This allows us to get get rid of a hack in XCoreTargetObjectFile where the the DataRel* sections were overridden. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181116 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Allow host triple to be correctly overridden in CMake buildsTim Northover
The intended semantics mirror autoconf, where the user is able to specify a host triple, but if it's left to the build system then "config.guess" is invoked for the default. This also renames the LLVM_HOSTTRIPLE define to LLVM_HOST_TRIPLE to fit in with the style of the surrounding defines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181112 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Fix a performance bug in the Linker.Rafael Espindola
Now that we hava a convinient place to keep it, remeber the set of identified structs as we merge modules. This speeds up the linking of all the bitcode files in clang with the gold plugin and -plugin-opt=emit-llvm (i.e., link only, no codegen) from 5:25 minutes to 13.6 seconds! Patch by Xiaofei Wan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181104 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Implement Linker::LinkModules with Linker::linkInModule.Rafael Espindola
Flipping which one is the implementation will let us optimize linkInModule. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181102 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Now that Linker.cpp is almost empty, merge it into LinkModules.cpp.Rafael Espindola
Also remove unused includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181100 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Last batch of cleanups to Linker.h.Rafael Espindola
Update comments, fix * placement, fix method names that are not used in clang, add a linkInModule that takes a Mode and put it in Linker.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Don't construct or delete a module on the Linker.Rafael Espindola
The linker is now responsible only for actually linking the modules, it is up to the clients to create and destroy them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Don't store the context in the Linker.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Remove unused members and constructor arguments.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Delete dead code from the linker.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181094 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Use consistent function names.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181090 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-04Tabs to spaces. No functionality change.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181082 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Revert r181009.Amara Emerson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Remove some uneeded pseudos in the presence of the naked function attribute.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[PowerPC] Avoid using '$' in generated assembler codeUlrich Weigand
PowerPC assemblers are supposed to support a stand-alone '$' symbol as an alternative of '.' to refer to the current PC. This does not work in the LLVM assembler parser yet. To avoid bootstrap failures when using the LLVM assembler as system assembler, this patch modifies the assembler source code generated by LLVM to avoid using '$' (and simply use '.' instead). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[PowerPC] Parse platform-specifc variant kinds in AsmParserUlrich Weigand
This patch adds support for PowerPC platform-specific variant kinds in MCSymbolRefExpr::getVariantKindForName, and also adds a test case to verify they are translated to the appropriate fixup type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[PowerPC] Add some Book II instructions to AsmParserUlrich Weigand
This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[PowerPC] Support extended mnemonics in AsmParserUlrich Weigand
This patch adds infrastructure to support extended mnemonics in the PowerPC assembler parser. It adds support specifically for those extended mnemonics that LLVM will itself generate. The test case lists *all* extended mnemonics according to the PowerPC ISA v2.06 Book I, but marks those not yet supported as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181051 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[PowerPC] Add assembler parserUlrich Weigand
This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-*-* and powerpc64-*-* triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181050 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Decompose GVN::processNonLocalLoad() (about 400 LOC) into smaller helper ↵Shuxin Yang
functions. No function change. This function consists of following steps: 1. Collect dependent memory accesses. 2. Analyze availability. 3. Perform fully redundancy elimination, or 4. Perform PRE, depending on the availability Step 2, 3 and 4 are now moved to three helper routines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181047 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[mips] Split the DSP control register and define one register for each field ofAkira Hatanaka
its fields. This removes false dependencies between DSP instructions which access different fields of the the control register. Implicit register operands are added to instructions RDDSP and WRDSP after instruction selection, depending on the value of the mask operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03LoopVectorizer: Add support for if-conversion of PHINodes with 3+ incoming ↵Nadav Rotem
values. By supporting the vectorization of PHINodes with more than two incoming values we can increase the complexity of nested if statements. We can now vectorize this loop: int foo(int *A, int *B, int n) { for (int i=0; i < n; i++) { int x = 9; if (A[i] > B[i]) { if (A[i] > 19) { x = 3; } else if (B[i] < 4 ) { x = 4; } else { x = 5; } } A[i] = x; } } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181037 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03R600: Expand vector or, shl, srl, and xor nodesTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181035 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03R600: BFI_INT is a vector-only instructionTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181034 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03R600: Add pattern for SHA-256 Ma functionTom Stellard
This can be optimized using the BFI_INT instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181033 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03R600: Clean up comments in Processors.tdTom Stellard
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181032 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03RegionInfo: Do not crash if unreachable block is foundTobias Grosser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181025 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[SystemZ] Add MCJIT supportRichard Sandiford
Another step towards reinstating the SystemZ backend. I'll commit the configure changes separately (TARGET_HAS_JIT etc.), then commit a patch to enable the MCJIT tests on SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181015 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[SystemZ] Support System Z as host architectureUlrich Weigand
The llvm::sys::AddSignalHandler function (as well as related routines) in lib/Support/Unix/Signals.inc currently registers a signal handler routine via "sigaction". When this handler is called due to a SIGSEGV, SIGILL or similar signal, it will show a stack backtrace, deactivate the handler, and then simply return to the operating system. The intent is that the OS will now retry execution at the same location as before, which ought to again trigger the same error condition and cause the same signal to be delivered again. Since the hander is now deactivated, the OS will take its default action (usually, terminate the program and possibly create a core dump). However, this method doesn't work reliably on System Z: With certain signals (namely SIGILL, SIGFPE, and SIGTRAP), the program counter stored by the kernel on the signal stack frame (which is the location where execution will resume) is not the instruction that triggered the fault, but then instruction *after it*. When the LLVM signal handler simply returns to the kernel, execution will then resume at *that* address, which will not trigger the problem again, but simply go on and execute potentially unrelated code leading to random errors afterwards. To fix this, the patch simply goes and re-raises the signal in question directly from the handler instead of returning from it. This is done only on System Z and only for those signals that have this particular problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Add support for reading ARM ELF build attributes.Amara Emerson
Build attribute sections can now be read if they exist via ELFObjectFile, and the llvm-readobj tool has been extended with an option to dump this information if requested. Regression tests are also included which exercise these features. Also update the docs with a fixed ARM ABI link and a new link to the Addenda which provides the build attributes specification. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181009 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03[SystemZ] Add llvm::Triple::systemzRichard Sandiford
First step towards reinstating the SystemZ backend. Tests will be included in the main backend patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03X86: Add target description for btver2; make autodetection logic aware of AVX.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181005 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Unbreaking the non-x86 build bots by protecting the AVX test code properly.Aaron Ballman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Correctly testing for AVX support in x86 based off code from Hosts.cpp.Aaron Ballman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03Fix missing include in Hexagon code for Release+AssertsReid Kleckner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03In MC asm parsing, account for the possibility of whitespace withinJohn McCall
the "identifier" parsed by the frontend callback by skipping forward until we've consumed a token that ends at the point dictated by the callback. In addition, inform the callback when it's parsing an unevaluated operand (e.g. mov eax, LENGTH A::x) as opposed to an evaluated one (e.g. mov eax, [A::x]). This commit depends on a clang commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180978 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02[mips] Handle reading, writing or copying of ccond field of DSP controlAkira Hatanaka
register. - Define pseudo instructions which store or load ccond field of the DSP control register. - Emit the pseudos in MipsSEInstrInfo::storeRegToStack and loadRegFromStack. - Expand the pseudos before callee-scan save. - Emit instructions RDDSP or WRDSP to copy between ccond field and GPRs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180969 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02reverting r180953Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02R600: Signed literals are 64bits wideVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180960 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02R600: If previous bundle is dot4, PV valid chan is always XVincent Lejeune
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180959 91177308-0d34-0410-b5e6-96231b3b80d8
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