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Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.
Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.
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This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.
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possible buffer change with a .macro directive.
rdar://12637628
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- We only support this when the client didn't claim to know the file size.
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Prior to this patch RuntimeDyld attempted to re-apply relocations every time reassignSectionAddress was called (via MCJIT::mapSectionAddress). In addition to being inefficient and redundant, this led to a problem when a section was temporarily moved too far away from another section with a relative relocation referencing the section being moved. To fix this, I'm adding a new method (finalizeObject) which the client can call to indicate that it is finished rearranging section addresses so the relocations can safely be applied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167400 91177308-0d34-0410-b5e6-96231b3b80d8
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to be extended to a full register. This is modeled in the IR by marking
the return value (or argument) with a signext or zeroext attribute.
However, while these attributes are respected for function arguments,
they are currently ignored for function return values by the PowerPC
back-end. This patch updates PPCCallingConv.td to ask for the promotion
to i64, and fixes LowerReturn and LowerCallResult to implement it.
The new test case verifies that both arguments and return values are
properly extended when passing them; and also that the optimizers
understand incoming argument and return values are in fact guaranteed
by the ABI to be extended.
The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll,
since the test case used a "ret" instruction to create a use of an i32
value at the end of the function (to set up data flow as required for
what the test is intended to test). Since there's now an implicit
promotion to i64, that data flow no longer works as expected. To fix
this, this patch now adds an extra "add" to ensure we have an appropriate
use of the i32 value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167396 91177308-0d34-0410-b5e6-96231b3b80d8
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The Z constraint specifies an r+r memory address, and the y modifier expands
to the "r, r" in the asm string. For this initial implementation, the base
register is forced to r0 (which has the special meaning of 0 for r+r addressing
on PowerPC) and the full address is taken in the second register. In the
future, this should be improved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167388 91177308-0d34-0410-b5e6-96231b3b80d8
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This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for
vector types when altivec is enabled.
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'nocapture' attribute.
The nocapture attribute only specifies that no copies are made that
outlive the function. This isn't the same as there being no copies at all.
This fixes PR14045.
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I'm applying it anyway since it seems to be obviously correct.
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also do it for vectors of pointers.
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instructions.
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for SSE4, AVX and AVX2.
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SETCC node would be illegal.
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register is needed.
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reserved. Without this fix, RegScavenger::getRegsAvailable incorrectly
returns an empty set of integer registers.
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C++ structs.
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inserting/extracting from XMM registers.
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instructions.
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This function estimates stack size and will be called before
PrologEpilogInserter scans the callee-saved registers.
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of the incoming argument area.
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"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
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Patch by Kai.
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values in the original object buffer.
Some ELF relocations require adding the a value to the original contents of the object buffer at the specified location. In order to properly handle multiple applications of a relocation, the RuntimeDyld code should be grabbing the original value from the object buffer and writing a new value into the loaded section buffer. This patch changes the parameters passed to resolveRelocations to accommodate this need.
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they are now all correct; hopefully the buildbots will agree!).
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The new analysis is not yet ready for prime time. It has a *critical*
flawed assumption, and some troubling shortages of testing. Until it's
been hammered into better shape, let's stick with the working code. This
should be easy to revert itself when the analysis is ready.
Fixes PR14241, a miscompile of any memcpy-able loop which uses a pointer
as the induction mechanism. If you have been seeing miscompiles in this
revision range, you really want to test with this backed out. The
results of this miscompile are a bit subtle as they can lead to
downstream passes concluding things are impossible which are in fact
possible.
Thanks to David Blaikie for the majority of the reduction of this
miscompile. I'll be checking in the test case in a non-revert commit.
Revesions reverted here:
r167045: LoopIdiom: Fix a serious missed optimization: we only turned
top-level loops into memmove.
r166877: LoopIdiom: Add checks to avoid turning memmove into an infinite
loop.
r166875: LoopIdiom: Recognize memmove loops.
r166874: LoopIdiom: Replace custom dependence analysis with
DependenceAnalysis.
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test/Transforms/GVN/rle.ll if the (currently disabled) check for a
pointer type in getIntPtrType is turned on.
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InputArg in r165616.
This will enable us to get the actual type for both InputArg and OutputArg.
rdar://9932559
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Reverts a LOCALMOD that incorrectly patched an upstream issue.
BUG= http://code.google.com/p/nativeclient/issues/detail?id=3110
TEST=none
Review URL: https://codereview.chromium.org/11364030
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the depth heuristic.
When target cost information is available, compute explicit costs of inserting and
extracting values from vectors. At this point, all costs are estimated using the
target information, and the chain-depth heuristic is not needed. As a result, it is now, by
default, disabled when using target costs.
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When reduce-memory-footprint is enabled, llc attempts to dematerialize all
functions once they are codegen'ed. However functions which have global
blockAddress constants referring to their BBs need to be kept around, or the
references will be replaced with bogus constants and not relocated.
BUG=none
TEST=computed_goto_test (easily reproducible by enabling -streaming-bitcde for ordinary llc)
Review URL: https://codereview.chromium.org/11364028
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This is related to issues #2751 and #3124. Neon support was added to
the ARM validator recently.
BUG= http://code.google.com/p/nativeclient/issues/detail?id=2751
Review URL: https://codereview.chromium.org/11368034
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