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2013-02-26R600/SI: fix VOP3b encoding v2Christian Konig
v2: document why we hardcode VCC for now. This is a candidate for the mesa-stable branch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26R600/SI: fix and cleanup SI register definition v2Christian Konig
Prevent producing real strange tablegen code by using proper register sizes, alignments and hierarchy. Also cleanup the unused definitions and add some comments. v2: add SGPR 512 bit registers, stop registers from wrapping around, fix SGPR alignment This is a candidate for the mesa-stable branch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26R600/SI: fix stupid typoChristian Konig
This is a candidate for the mesa-stable branch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Fix PR15359.Bill Schmidt
The PowerPC TLS relocation types were not previously added to the necessary list in MCELFStreamer::fixSymbolsInTLSFixups(). Now they are! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176094 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Unify clang/llvm attributes for asan/tsan/msan (LLVM part)Kostya Serebryany
These are two related changes (one in llvm, one in clang). LLVM: - rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode) - rename thread_safety => sanitize_thread - rename no_uninitialized_checks -> sanitize_memory CLANG: - add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis)) - add __attribute__((no_sanitize_thread)) - add __attribute__((no_sanitize_memory)) for S in address thread memory If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not set llvm attribute sanitize_S git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176075 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Use a DenseMap instead of a std::map for AnalysisID -> Pass* maps. This ↵Michael Ilseman
reduces the pass-manager overhead from FPPassManager::runOnFunction() by about 10%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26[mips] Use class RegDefsUses to track register defs and uses.Akira Hatanaka
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26[fast-isel] Make sure the FastLowerArguments function checks to make sure theChad Rosier
arguments type is a simple type. rdar://13290455 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176066 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Refine fix to PR10499, no functionality changeMichael Liao
- Put expensive checking after simple one git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176060 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix PR10499Michael Liao
- Check whether SSE is available before lowering all 1s vector building with PCMPEQD, which is only available from SSE2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix wording.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25[fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 orChad Rosier
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25pre-RA-sched fix: only reevaluate physreg interferences when necessary.Andrew Trick
Fixes rdar:13279013: scheduler was blowing up on select instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176037 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25[ms-inline asm] Add support for the pushad/popad mnemonics.Chad Rosier
rdar://13254235 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix missing relocation for TLS addressing peephole optimization.Bill Schmidt
Report and fix due to Kai Nacke. Testcase update by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176029 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix spelling noticed by Duncan.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176023 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix the root cause of PR15348 by correctly handling alignment 0 onChandler Carruth
memory intrinsics in the SDAG builder. When alignment is zero, the lang ref says that *no* alignment assumptions can be made. This is the exact opposite of the internal API contracts of the DAG where alignment 0 indicates that the alignment can be made to be anything desired. There is another, more explicit alignment that is better suited for the role of "no alignment at all": an alignment of 1. Map the intrinsic alignment to this early so that we don't end up generating aligned DAGs. It is really terrifying that we've never seen this before, but we suddenly started generating a large number of alignment 0 memcpys due to the new code to do memcpy-based copying of POD class members. That patch contains a bug that rounds bitfield alignments down when they are the first field. This can in turn produce zero alignments. This fixes weird crashes I've seen in library users of LLVM on 32-bit hosts, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176022 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25DIBuilder: support structs with vtable pointers in the same way as classesDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176004 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 Make psuedo FEXT_T8I816_ins into a custom emitter.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24Fix PR14364.Bill Schmidt
This removes a const_cast hack from PPCRegisterInfo::hasReservedSpillSlot(). The proper place to save the frame index for the CR spill slot is in the PPCFunctionInfo object, not the PPCRegisterInfo object. No new test cases, as this just reimplements existing function. Existing tests such as test/CodeGen/PowerPC/crsave.ll are sufficient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24CVP: If we have a PHI with an incoming select, try to skip the select.Benjamin Kramer
This is a common pattern with dyn_cast and similar constructs, when the PHI no longer depends on the select it can often be turned into a simpler construct or even get hoisted out of the loop. PR15340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24TypoFrancois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24Revert r169638 because it broke Mesa llvmpipe tests.Nadav Rotem
Fix PR15239. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24Make psuedo FEXT_T8I816_ins a custom inserter. It should be expandedReed Kotler
as early as possible; which means during instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24Add a use of an otherwise unused variable to remove a warning in non-AssertsCameron Zwarich
builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24TwoAddressInstructionPass::tryInstructionTransform() only potentially returnsCameron Zwarich
true when shouldOnlyCommute is false, so we can remove code that checks otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175980 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24TwoAddrInstructionPass::tryInstructionTransform() has a case where it callsCameron Zwarich
itself recursively with a new instruction that has not been finalized, in order to determine whether to keep the instruction. On 'make check' and test-suite the only cases where the recursive invocation made any transformations were simple instruction commutations, so I am restricting the recursive invocation to do only this. The other cases wouldn't work correctly when updating LiveIntervals, since the new instructions don't have slot indices and LiveIntervals hasn't yet been updated. If the other transformations were actually triggering in any test case it would be possible to support it with a lot of effort, but since they don't it's not worth it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Add new base instruction def for cmpi, cmp, slt and sltu so that def/usesReed Kotler
proper. Fixed this already a few days ago for slti. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175975 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23TargetInstrInfo::commuteInstruction() doesn't actually return a new instructionCameron Zwarich
unless it was requested to with an optional parameter that defaults to false, so we don't need to handle that case in TwoAddressInstructionPass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23X86: Disable cmov-memory patterns on subtargets without cmov.Benjamin Kramer
Fixes PR15115. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175962 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Make some fixes for LiveInterval repair with debug info. Debug valueCameron Zwarich
MachineInstrs don't have a slot index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Fix a bug with the LiveIntervals updating in the two-address pass found byCameron Zwarich
running ASCI_Purple/SMG2000 in the test-suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware inCameron Zwarich
TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky, since multiple instructions need to be moved down, one-at-a-time, in reverse order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Expand pseudos/macros for Selt. This is the last of the complexReed Kotler
macros.The rest is some small misc. stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23ARM: Convenience aliases for 'srs*' instructions.Jim Grosbach
Handle an implied 'sp' operand. rdar://11466783 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Fixed a careless mistake.Michael Gottesman
rdar://13273675. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Use getSplitDebugFilename when constructing the skeleton cu andEric Christopher
update testcase accordingly to give the correct name to the cu. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Add a field to the compile unit of where we plan on splitting outEric Christopher
the debug info for -gsplit-dwarf so we can encode that location in the skeleton cu. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Add a TODO and explain when we can get rid of the isMain field.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22SelectionDAG compile time improvement.Nadav Rotem
One of the phases of SelectionDAG is LegalizeVectors. We don't need to sort the DAG and copy nodes around if there are no vector ops. Speeds up the compilation time of SelectionDAG on a big scalar workload by ~8%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22ABI Verifier: Check types in metadata nodesDerek Schuff
This should be the last source of type references R=jvoung@chromium.org,eliben@chromium.org BUG= https://code.google.com/p/nativeclient/issues/detail?id=2309 Review URL: https://codereview.chromium.org/12321032
2013-02-22[mips] Emit call16 operator instead of got_disp. The former allows lazy binding.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22x86_64: designate most general purpose and SSE registers as callee save ↵Peter Collingbourne
under coldcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22R600/SI: Add pattern for sign extension of i1 to i32.Michel Danzer
16 more little piglits with radeonsi. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175887 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22R600/SI: Add pattern for logical or of i1 values.Michel Danzer
24 more little piglits with radeonsi. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22R600/SI: Add pattern for fceil.Michel Danzer
9 more little piglits with radeonsi. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Make ARMAsmPrinter generate the correct alignment specifier syntax in ↵Kristof Beyls
instructions. The Printer will now print instructions with the correct alignment specifier syntax, like vld1.8 {d16}, [r0:64] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8
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