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2011-05-21Implement mulo x, 2 -> addo x, x in DAGCombiner.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Revert "InstCombine: Turn mul.with.overflow(X, 2) into the cheaper ↵Benjamin Kramer
add.with.overflow(X, X)" It's better to do this in codegen, mul.with.overflow(X, 2) is more canonical because it has only one use on "X". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Don't allow .seh_handler and .seh_handlerdata directives inside chainedCharles Davis
unwind areas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21A handler for a function in the Win64 EH scheme can be both an unwind handlerCharles Davis
and an exception handler. Handle that case. Also, add an 'Emitted' member to the MCWin64EHUnwindInfo struct. It will be needed later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131791 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21InstCombine: Turn mul.with.overflow(X, 2) into the cheaper ↵Benjamin Kramer
add.with.overflow(X, X) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC ↵Cameron Zwarich
code. It is already in GR64 for the same reasons. Since it isn't allocatable it can't cause any problems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Use the correct register to access stack frame objects.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131785 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Insert instructions that copy $sp to or from $fp at the right locations. Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131784 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21When BasicAA can determine that two pointers have the same base butDan Gohman
differ by a dynamic offset, return PartialAlias instead of MayAlias. See the comment in the code for details. This fixes PR9971. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Have Program::Wait return -2 for crashed and timeouts instead of embeddingAndrew Trick
info in the error message. Per Dan's request. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21Set the "LastFrameInst" field when streaming a .seh_setframe directive. ThisCharles Davis
is needed for an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Fix PR9962 by properly constraining register classes in ↵Cameron Zwarich
RemoveCopyByCommutingDef(). This actually fixes most of the VerifyCoalescing failures in test-suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Change the order fixed objects are created in MipsTargetLowering::LowerCall inAkira Hatanaka
preparation for reversing StackDirection. Fixed objects are created in the following order: 1. Incoming arguments passed on stack. 2. va_arg objects (include both arguments that are passed in registers and pointer to the location of the first va_arg argument). 3. $gp restore slot. 4. Outgoing arguments passed on stack. 5. Pointer to alloca'd space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Fix typo. When will I learn?Charles Davis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131765 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Add fast-isel support for byval calls on x86.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Add .pdata and .xdata sections to the COFF TLOF implementation.Charles Davis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20No reason not to allow defining the CFA as a reg w/ offset zero.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131760 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20In CC_MipsO32, allocate a stack space regardless of whether the argument isAkira Hatanaka
passed in register or on the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Fix typo.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131757 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Add support for frame info use of the .cfi_def_cfa directive.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Add missing leading \t when printing .cfi_def_cfa in the asmstreamer.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131755 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Define functions that get/set maximum call frame size.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20adds some attributes to attribute section when cpu is "xscale"Rafael Espindola
(this is what used in Android NDK, when architecture is ARMv5) patch by Koan-Sin Tan git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20fixes target address tBL and tBLX and sets relocation typeRafael Espindola
of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6) Patch by koan-sin tan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.Stuart Hastings
rdar://problem/8614450 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka
saving and restoring them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20indvars: Prototyping Sign/ZeroExtend elimination without canonical IVs.Andrew Trick
No functionality enabled by default. Use -disable-iv-rewrite. Extended IVUsers to keep track of the phi that represents the users' IV. Added the WidenIV transform to replace a narrow IV with a wide IV by doing a one-for-one replacement of IV users instead of expanding the SCEV expressions. [sz]exts are removed and truncs are inserted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Now that they're implemented, make the Win64 EH MCAsmStreamer methods callCharles Davis
super. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Revert accidental commit.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20"Implement" the HandlerData Win64 EH method in the base MCStreamer.Charles Davis
There's really nothing to implement. All this really does is swap to a pseudo-section that later gets written to the unwind info struct. That needs to be implemented in the object streamers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131734 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Remove noisy semicolons.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to ↵Cameron Zwarich
preserve the phikill flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20indvars: minor cleanup in preparation for sign/zero extend elimination.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Fix bug in which nodes that write to argument registers do not get glued ↵Akira Hatanaka
with the JALR node. Patch by Sasa Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Remove code that creates unnecessary frame objects.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Define variables and functions in MipsFunctionInfo.Akira Hatanaka
This is the first of a series of patches that attempt to simplify handling of stack frame objects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Don't attempt to tail call optimize for Win64.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20Revert r131664 and fix it in instcombine instead. rdar://9467055Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Fix PR9955 by only attaching load memory operands to load instructions andCameron Zwarich
similarly for stores. Now "make check" passes with the MachineVerifier forced on with the VerifyCoalescing option! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Add fast-isel support for zeroext and signext ret instructions on x86.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Looks like OS X assemblers (including MC) don't likeRafael Espindola
foo: bar = foo .quad bar Avoid producing it. Fixes PR9951. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131687 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Misc code refactorings:Rafael Espindola
* Remove unnecessary arguments now that ForceExpAbs is a method. * Use ForceExpAbs in EmitAbsValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Oddly people want to use the 'r' constraint for fp constants on x86.Eric Christopher
Fixes rdar://9218925 Fixes PR9601 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Implement the EndProlog Win64 EH method on the base MCStreamer.Charles Davis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19This fixes one divergence between LLVM and binutils for ARM in theJason W Kim
text section. Assume the following bit of annotated assembly: .section .data.rel.ro,"aw",%progbits .align 2 .LAlpha: .long startval(GOTOFF) .text .align 2 .type main,%function .align 4 main: ;;; assume "main" starts at offset 0x20 0x0 push {r11, lr} 0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-4) + 8) = -20 0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8)) ;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8) ;;; ==> (??? - ((16-8) + 8) = -16 0xc ... blah .LBeta: 0x10 add r0, pc, r0 0x14 ... blah .LGamma: 0x18 add r1, pc, r1 Above snippet results in the following relocs in the .o file for the first pair of movw/movt instructions 00000024 R_ARM_MOVW_PREL_NC .LAlpha 00000028 R_ARM_MOVT_PREL .LAlpha And the encoded instructions in the .o file for main: must be 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20 28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16 However, llc (prior to this commit) generates the following sequence 00000020 <main>: 20: e92d4800 push {fp, lr} 24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20 28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1 What has to happen in the ArmAsmBackend is that if the relocation is PC relative, the 16 bits encoded as part of movw and movt must be both addends, not addresses. It makes sense to encode addresses by right shifting the value by 16, but the result is incorrect for PIC. i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case. This change agrees with what GNU as does, and makes the PIC code run. MC/ARM/elf-movt.s covers this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Reapply r131605. This time with a fix, which is to use NoFolder.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.Rafael Espindola
Fixes PR9934. We really need to start tblgening the relocation info :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Align i64 arguments to 64 bit boundaries.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19Implement the Win64 EH prolog instruction methods on the base MCStreamer.Charles Davis
I had to change the API slightly to avoid overloading issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131666 91177308-0d34-0410-b5e6-96231b3b80d8
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