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2006-04-15significant cleanups to code that uses insert/extractelt heavily. This buildsChris Lattner
maximal shuffles out of them where possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27717 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Added SSE (and other) entries to foldMemoryOperand().Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27716 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Some clean upEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27715 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Allow undef in a shuffle maskChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Move these ctors out of lineChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27713 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Last few SSE3 intrinsics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Teach scalarrepl to promote unions of vectors and floats, producingChris Lattner
insert/extractelement operations. This implements Transforms/ScalarRepl/vector_promote.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27710 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Misc. SSE2 intrinsics: clflush, lfench, mfenceEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27699 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14We were not adjusting the frame size to ensure proper alignment when alloca /Evan Cheng
vla are present in the function. This causes a crash when a leaf function allocates space on the stack used to store / load with 128-bit SSE instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27698 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14New entryEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27697 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Don't print out the install command for Intrinsics.gen unless VERBOSE mode.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Make this assertion betterChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27695 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Move the rest of the PPCTargetLowering::LowerOperation cases out intoChris Lattner
separate functions, for simplicity and code clarity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27693 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Pull the VECTOR_SHUFFLE and BUILD_VECTOR lowering code out into separateChris Lattner
functions, which makes the code much cleaner :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27692 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14Implement value #'ing for vector operations, implementingChris Lattner
Regression/Transforms/GCSE/vectorops.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27691 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14pcmpeq* and pcmpgt* intrinsics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27685 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14psll*, psrl*, and psra* intrinsics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27684 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Remove the .cvsignore file so this directory can be pruned.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27683 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Remove .cvsignore so that this directory can be pruned.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27682 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Handle some kernel code than ends in [0 x sbyte]. I think this is safeAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27672 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Expand some code with temporary variables to rid ourselves of the warningReid Spencer
about "dereferencing type-punned pointer will break strict-aliasing rules" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27671 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Doh. PANDrm, etc. are not commutable.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27668 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Force non-darwin targets to use a static relo model. This fixes PR734,Chris Lattner
tested by CodeGen/Generic/vector.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27657 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13add a note, move an altivec todo to the altivec list.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27654 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13linear -> constant timeAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27652 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Add the README files to the distribution.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27651 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13psad, pmax, pmin intrinsics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27647 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Various SSE2 packed integer intrinsics: pmulhuw, pavgw, etc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13X86 SSE2 supports v8i16 multiplicationEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27644 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13UpdateEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27643 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27639 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13Naming inconsistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27638 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12SSE / SSE2 conversion intrinsics.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27637 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12All "integer" logical ops (pand, por, pxor) are now promoted to v2i64.Evan Cheng
Clean up and fix various logical ops issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Promote vector AND, OR, and XOREvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27632 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Make sure CVS versions of yacc and lex files get distributed.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27630 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Get rid of a signed/unsigned compare warning.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27625 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Add a new way to match vector constants, which make it easier to bang bits ofChris Lattner
different types. Codegen spltw(0x7FFFFFFF) and spltw(0x80000000) without a constant pool load, implementing PowerPC/vec_constants.ll:test1. This compiles: typedef float vf __attribute__ ((vector_size (16))); typedef int vi __attribute__ ((vector_size (16))); void test(vi *P1, vi *P2, vf *P3) { *P1 &= (vi){0x80000000,0x80000000,0x80000000,0x80000000}; *P2 &= (vi){0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF}; *P3 = vec_abs((vector float)*P3); } to: _test: mfspr r2, 256 oris r6, r2, 49152 mtspr 256, r6 vspltisw v0, -1 vslw v0, v0, v0 lvx v1, 0, r3 vand v1, v1, v0 stvx v1, 0, r3 lvx v1, 0, r4 vandc v1, v1, v0 stvx v1, 0, r4 lvx v1, 0, r5 vandc v0, v1, v0 stvx v0, 0, r5 mtspr 256, r2 blr instead of (with two constant pool entries): _test: mfspr r2, 256 oris r6, r2, 49152 mtspr 256, r6 li r6, lo16(LCPI1_0) lis r7, ha16(LCPI1_0) li r8, lo16(LCPI1_1) lis r9, ha16(LCPI1_1) lvx v0, r7, r6 lvx v1, 0, r3 vand v0, v1, v0 stvx v0, 0, r3 lvx v0, r9, r8 lvx v1, 0, r4 vand v1, v1, v0 stvx v1, 0, r4 lvx v1, 0, r5 vand v0, v1, v0 stvx v0, 0, r5 mtspr 256, r2 blr GCC produces (with 2 cp entries): _test: mfspr r0,256 stw r0,-4(r1) oris r0,r0,0xc00c mtspr 256,r0 lis r2,ha16(LC0) lis r9,ha16(LC1) la r2,lo16(LC0)(r2) lvx v0,0,r3 lvx v1,0,r5 la r9,lo16(LC1)(r9) lwz r12,-4(r1) lvx v12,0,r2 lvx v13,0,r9 vand v0,v0,v12 stvx v0,0,r3 vspltisw v0,-1 vslw v12,v0,v0 vandc v1,v1,v12 stvx v1,0,r5 lvx v0,0,r4 vand v0,v0,v13 stvx v0,0,r4 mtspr 256,r12 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27624 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Turn casts into getelementptr's when possible. This enables SROA to be moreChris Lattner
aggressive in some cases where LLVMGCC 4 is inserting casts for no reason. This implements InstCombine/cast.ll:test27/28. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27620 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Don't emit useless warning messages.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27617 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Rename get_VSPLI_elt -> get_VSPLTI_eltChris Lattner
Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each form, eliminating a bunch of Pat patterns in the .td file and allowing us to CSE stuff more aggressively. This implements PowerPC/buildvec_canonicalize.ll:VSPLTI git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Promote v4i32, v8i16, v16i8 load to v2i64 load.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Ensure that zero vectors are always v4i32, which forces them to CSE withChris Lattner
each other. This implements CodeGen/PowerPC/vxor-canonicalize.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Vector type promotion for ISD::LOAD and ISD::SELECTEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Implement support for the formal_arguments node. To get this, targets ↵Chris Lattner
shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Various SSE2 conversion intrinsicsEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12Don't memoize vloads in the load map! Don't memoize them anywhere here, letChris Lattner
getNode do it. This fixes CodeGen/Generic/2006-04-11-vecload.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27602 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11Added __builtin_ia32_storelv4si, __builtin_ia32_movqv4si,Evan Cheng
__builtin_ia32_loadlv4si, __builtin_ia32_loaddqu, __builtin_ia32_storedqu. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27599 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11Fix SingleSource/UnitTests/Vector/sumarray-dblNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27594 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11Fix PR727, correctly handling large stack aligments on ppcNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27593 91177308-0d34-0410-b5e6-96231b3b80d8
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