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2006-02-18x86 / Darwin PIC support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26273 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18Moved PICEnabled to include/llvm/Target/TargetOptions.hEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26272 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn'tChris Lattner
exactly the API we wanted to call into. This fixes the crash on crafty last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26269 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Clean up DemandedBitsAreZero interfaceNate Begeman
Make more use of the new mask helpers in valuetypes.h Combine (sra (srl x, c1), c1) -> sext_inreg if legal git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26263 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Don't expand sdiv by power of two before legalize, since it will likelyNate Begeman
generate illegal nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26261 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17unbreak the buildChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Unbreak x86 beEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Fix loops where the header has an exit, fixing a loop-unswitch crash on craftyChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26258 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBCNate Begeman
and SUBE nodes that actually expose what's going on and allow for significant simplifications in the targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Fix another miscompilation exposed by lencode, where we lowered i64->f32Chris Lattner
conversions to __floatdidf instead of __floatdisf on targets that support f32 but not i64 (e.g. sparc). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26254 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17add note about div by power of 2Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26253 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Fix bug noticed by VC++.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Whoops, didn't mean to check this in yet.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Add a missing and useful pat fragNate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26249 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17start of some new simplification code, not thoroughly tested, use at your ownChris Lattner
risk :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26248 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers"Evan Cheng
issue. Need to do more experiments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26247 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Kill the x86 pattern isel. boom.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17Remove the entry about using movapd for SSE reg-reg moves.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26245 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16pxor (for FLD0SS) encoding was missing the OpSize prefix.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Remove the skeleton target, it doesn't produce useful code and there areChris Lattner
other small targets that do that can be learned from. They also have the added advantage of being tested :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Dumb bug. Code sees a memcpy from X+c so it increments src offset. But itEvan Cheng
turns out not to point to a constant string but it forgot change the offset back. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26242 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-161. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. ThisEvan Cheng
proves to be worth 20% on Ptrdist/ks. Might be related to dependency breaking support. 2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These are used for FR32 / FR64 reg-to-reg copies. 3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to spill / restore FsMOVAPSrr and FsMOVAPDrr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Use movaps / movapd to spill / restore V4F4 / V2F8 registers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26240 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Rework the SelectionDAG-based implementations of SimplifyDemandedBitsNate Begeman
and ComputeMaskedBits to match the new improved versions in instcombine. Tested against all of multisource/benchmarks on ppc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. ↵Chris Lattner
Apparently they do different things :) This fixes a testcase that nate reduced from spass. Also included are a couple minor code changes that don't affect the generated code at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26235 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16distinguish between objects and register names, now we can have stuffDuraid Madina
with names like "f84", "in6" etc etc. this should fix one or two tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16If the false case is the current basic block, then this is a self loop.Evan Cheng
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra instruction in the loop. Instead, invert the condition and emit "Loop: ... br!cond Loop; br Out. Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Lowering of sdiv X, pow2 was broken, this fixes it. This patch is writtenChris Lattner
by Nate, I'm just committing it for him. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Fix VC++ warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26228 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to regEvan Cheng
transfer. According to the Intel P4 Optimization Manual: Moves that write a portion of a register can introduce unwanted dependences. The movsd reg, reg instruction writes only the bottom 64 bits of a register, not to all 128 bits. This introduces a dependence on the preceding instruction that produces the upper 64 bits (even if those bits are not longer wanted). The dependence inhibits register renaming, and thereby reduces parallelism. Not to mention movaps is shorter than movss. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16fix a bug where we unswitched the wrong wayChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16A bit more memset / memcpy optimization.Evan Cheng
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned, 2) size is not known to be greater or equal to some minimum value (currently 128). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26224 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Implement trivial unswitching for switch stmts. This allows us to trivialChris Lattner
unswitch this loop on 2 before sweating to unswitch on 1/3. void test4(int N, int i, int C, int*P, int*Q) { int j; for (j = 0; j < N; ++j) { switch (C) { // general unswitching. default: P[i+j] = 0; break; case 1: Q[i+j] = 0; break; case 3: P[i+j] = Q[i+j]; break; case 2: break; // TRIVIAL UNSWITCH on C==2 } } } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26223 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Remove an entry.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Remove an unused function parameter.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26221 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15make "trivial" unswitching significantly more general. It can now handleChris Lattner
this for example: for (j = 0; j < N; ++j) { // trivial unswitch if (C) P[i+j] = 0; } turning it into the obvious code without bothering to duplicate an empty loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26220 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Turn a memcpy from string constant into a series of stores of constant values.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26219 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15fix a bunch of alpha regressions. see bug 709Andrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26218 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15new testChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26217 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Should not combine ISD::LOCATIONs until we have scheme to remove fromJim Laskey
MachineDebugInfo tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26216 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Checking the wrong value. This caused us to emit silly code likeChris Lattner
Y = seteq bool X, true instead of just using X :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26215 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Convert this over to work with the new makefilesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26206 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Sparc actually *DOES* have a directive for emitting zeros. In fact, it requiresChris Lattner
it, because this: .bss X: .byte 0 results in the assembler warning: "initialization in bss segment". Annoying. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15random lexer change to test the makefile updating stuffChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26203 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.Chris Lattner
The ABI specifies that there is a register save area at the bottom of the stack, which means the actual used pointer needs to be an offset from the subtracted value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Remove an entry.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26197 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Use .zerofill on x86/darwin.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26196 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15Lower memcpy with small constant size operand into a series of load / storeEvan Cheng
ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26195 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15more refactoring, no functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26194 91177308-0d34-0410-b5e6-96231b3b80d8
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