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2006-04-02vector casts of casts are eliminable. Transform this:Chris Lattner
%tmp = cast <4 x uint> %tmp to <4 x int> ; <<4 x int>> [#uses=1] %tmp = cast <4 x int> %tmp to <4 x float> ; <<4 x float>> [#uses=1] into: %tmp = cast <4 x uint> %tmp to <4 x float> ; <<4 x float>> [#uses=1] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27355 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02vector casts never reinterpret bitsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27354 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Allow transforming this:Chris Lattner
%tmp = cast <4 x uint>* %testData to <4 x int>* ; <<4 x int>*> [#uses=1] %tmp = load <4 x int>* %tmp ; <<4 x int>> [#uses=1] to this: %tmp = load <4 x uint>* %testData ; <<4 x uint>> [#uses=1] %tmp = cast <4 x uint> %tmp to <4 x int> ; <<4 x int>> [#uses=1] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27353 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Turn altivec lvx/stvx intrinsics into loads and stores. This allows theChris Lattner
elimination of one load from this: int AreSecondAndThirdElementsBothNegative( vector float *in ) { #define QNaN 0x7FC00000 const vector unsigned int testData = (vector unsigned int)( QNaN, 0, 0, QNaN ); vector float test = vec_ld( 0, (float*) &testData ); return ! vec_any_ge( test, *in ); } Now generating: _AreSecondAndThirdElementsBothNegative: mfspr r2, 256 oris r4, r2, 49152 mtspr 256, r4 li r4, lo16(LCPI1_0) lis r5, ha16(LCPI1_0) addi r6, r1, -16 lvx v0, r5, r4 stvx v0, 0, r6 lvx v1, 0, r3 vcmpgefp. v0, v0, v1 mfcr r3, 2 rlwinm r3, r3, 27, 31, 31 xori r3, r3, 1 cntlzw r3, r3 srwi r3, r3, 5 mtspr 256, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27352 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Remove done itemChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to ↵Chris Lattner
work with PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27348 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Implement the Expand action for binary vector operations to break the binopChris Lattner
into elements and operate on each piece. This allows generic vector integer multiplies to work on PPC, though the generated code is horrible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27347 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Intrinsics that just load from memory can be treated like loads: they don'tChris Lattner
have to serialize against each other. This allows us to schedule lvx's across each other, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Adjust to change in Intrinsics.gen interface.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27344 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Constant fold all of the vector binops. This allows us to compile this:Chris Lattner
"vector unsigned char mergeLowHigh = (vector unsigned char) ( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 ); vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));" aka: void %test2(<16 x sbyte>* %P) { store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P ret void } into this: _test2: mfspr r2, 256 oris r4, r2, 32768 mtspr 256, r4 li r4, lo16(LCPI2_0) lis r5, ha16(LCPI2_0) lvx v0, r5, r4 stvx v0, 0, r3 mtspr 256, r2 blr instead of this: _test2: mfspr r2, 256 oris r4, r2, 49152 mtspr 256, r4 li r4, lo16(LCPI2_0) lis r5, ha16(LCPI2_0) vspltisb v0, 8 lvx v1, r5, r4 vxor v0, v1, v0 stvx v0, 0, r3 mtspr 256, r2 blr ... which occurs here: http://developer.apple.com/hardware/ve/calcspeed.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Add a new -view-legalize-dags command line optionChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Implement constant folding of bit_convert of arbitrary constant ↵Chris Lattner
vbuild_vector nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02These entries already existChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Add some missing node namesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02New noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27337 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Constant fold casts from things like <4 x int> -> <4 x uint>, likewise int<->fp.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27336 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) intoChris Lattner
"vspltisb v0, 8" instead of a constant pool load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02Prefer larger register classes over smaller ones when a register occurs inChris Lattner
multiple register classes. This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01add valuemapper support for inline asmChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27332 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxorChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01Fix InstCombine/2006-04-01-InfLoop.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27330 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01Fold A^(B&A) -> (B&A)^AChris Lattner
Fold (B&A)^A == ~B & A This implements InstCombine/xor.ll:test2[56] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27328 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01Fix Transforms/IndVarsSimplify/2006-03-31-NegativeStride.ll andChris Lattner
PR726 by performing consistent signed division, not consistent unsigned division when evaluating scev's. Do not touch udivs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-01ADd a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31If we can look through vector operations to find the scalar version of anChris Lattner
extract_element'd value, do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27323 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Shrinkify some more intrinsic definitions.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31An entry about packed type alignments.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27321 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Pull operand asm string into base class, shrinkifying intrinsic definitions.Chris Lattner
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31TargetData.cpp::getTypeInfo() was returning alignment of element type as theEvan Cheng
alignment of a packed type. This is obviously wrong. Added a workaround that returns the size of the packed type as its alignment. The correct fix would be to return a target dependent alignment value provided via TargetLowering (or some other interface). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27319 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Delete identity shuffles, implementing ↵Chris Lattner
CodeGen/Generic/vector-identity-shuffle.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Fix 80 column violations :)Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Use a X86 target specific node X86ISD::PINSRW instead of a mal-formedEvan Cheng
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31fix a pastoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Add vperm support for all datatypesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Rearrange code a bitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Add, sub and shuffle are legal for all vector typesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Add support to use pextrw and pinsrw to extract and insert a word elementEvan Cheng
from a 128-bit vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Add vector_extract and vector_insert nodes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27303 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27302 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31constant fold extractelement with undef operands.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27301 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31extractelement(undef,x) -> undefChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27300 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Do not endian swap split vector loads. This fixes ↵Chris Lattner
UnitTests/Vector/sumarray-dbl on PPC. Now all UnitTests/Vector/* tests pass on PPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Do not endian swap the operands to a store if the operands came from a vector.Chris Lattner
This fixes UnitTests/Vector/simple.c with altivec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Remove dead *extloads. This allows us to codegen vector.ll:test_extract_eltChris Lattner
to: test_extract_elt: alloc r3 = ar.pfs,0,1,0,0 adds r8 = 12, r32 ;; ldfs f8 = [r8] mov ar.pfs = r3 br.ret.sptk.many rp instead of: test_extract_elt: alloc r3 = ar.pfs,0,1,0,0 adds r8 = 28, r32 adds r9 = 24, r32 adds r10 = 20, r32 adds r11 = 16, r32 ;; ldfs f6 = [r8] ;; ldfs f6 = [r9] adds r8 = 12, r32 adds r9 = 8, r32 adds r14 = 4, r32 ;; ldfs f6 = [r10] ;; ldfs f6 = [r11] ldfs f8 = [r8] ;; ldfs f6 = [r9] ;; ldfs f6 = [r14] ;; ldfs f6 = [r32] mov ar.pfs = r3 br.ret.sptk.many rp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Delete dead loads in the dag. This allows us to compileChris Lattner
vector.ll:test_extract_elt2 into: _test_extract_elt2: lfd f1, 32(r3) blr instead of: _test_extract_elt2: lfd f0, 56(r3) lfd f0, 48(r3) lfd f0, 40(r3) lfd f1, 32(r3) lfd f0, 24(r3) lfd f0, 16(r3) lfd f0, 8(r3) lfd f0, 0(r3) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixesChris Lattner
Generic/vector.ll:test_extract_elt on non-sse X86 systems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Scalarized vector stores need not be legal, e.g. if the vector element typeChris Lattner
needs to be promoted or expanded. Relegalize the scalar store once created. This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31Fix build breakage.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27292 91177308-0d34-0410-b5e6-96231b3b80d8
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